Arthur J. O'Neill, JR.

Person

Poughkeepsie, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Performance optimization and dynamic resource reservation for guara...
- Patent number 8,352,687
- Issue date Jan 8, 2013
- International Business Machines Corporation
- Deanna Postles Dunn Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic trailing edge latency absorption for fetch data forwarded f...
- Patent number 8,327,078
- Issue date Dec 4, 2012
- International Business Machines Corporation
- Deanna Postles Dunn Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for optimizing sequential data fetches in a computer system
- Patent number 8,327,070
- Issue date Dec 4, 2012
- International Business Machines Corporation
- Ekaterina M. Ambroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherency protocol with built in avoidance for conflicting re...
- Patent number 8,250,308
- Issue date Aug 21, 2012
- International Business Machines Corporation
- Vesselina K. Papazova
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing EDRAM refresh rates in a high performance cache architec...
- Patent number 8,244,972
- Issue date Aug 14, 2012
- International Business Machines Corporation
- Timothy C. Bronson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Least recently used (LRU) compartment capture in a cache memory system
- Patent number 8,180,970
- Issue date May 15, 2012
- International Business Machines Corporation
- Arthur J. O'Neill, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system and computer program product for preventing lockout...
- Patent number 7,934,059
- Issue date Apr 26, 2011
- International Business Machines Corporation
- Vesselina K. Papazova
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
OPTIMIZING EDRAM REFRESH RATES IN A HIGH PERFORMANCE CACHE ARCHITEC...
- Publication number 20120278548
- Publication date Nov 1, 2012
- International Business Machines Corporation
- Timothy C. Bronson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOADING AND UNLOADING A MEMORY ELEMENT FOR DEBUG
- Publication number 20110320716
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Adam B. Collura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC TRAILING EDGE LATENCY ABSORPTION FOR FETCH DATA FORWARDED F...
- Publication number 20110320721
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Deanna Postles Dunn Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING EDRAM REFRESH RATES IN A HIGH PERFORMANCE CACHE ARCHITEC...
- Publication number 20110320701
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Timothy C. Bronson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR OPTIMIZING SEQUENTIAL DATA FETCHES IN A COMPUTER SYSTEM
- Publication number 20110320740
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Ekaterina M. Ambroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM FOR ERROR CHECKING FETCH AND STORE DATA
- Publication number 20110320909
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Michael Fee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE CACHE DIRECTORY ERROR CORRECTION CODE
- Publication number 20110320919
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Ekaterina M. Ambroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC RE-ALLOCATION OF CACHE BUFFER SLOTS
- Publication number 20110320863
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Ekaterina M. Amroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PIPELINE CACHE ERROR CORRECTION
- Publication number 20110320866
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Ekaterina M. Ambroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE MONITORING IN A SHARED PIPELINE
- Publication number 20110320779
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Ekaterina M. Ambroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION AND RECOVERY IN A SHARED PIPELINE
- Publication number 20110320855
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Ekaterina M. Ambroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Main Memory Operations In A Symmetric Multiprocessing Computer
- Publication number 20110320737
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Garrett M. Drapala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE OPTIMIZATION AND DYNAMIC RESOURCE RESERVATION FOR GUARA...
- Publication number 20110320728
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Deanna Postles Dunn Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USER-CONTROLLED TARGETED CACHE PURGE
- Publication number 20110320732
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Ekaterina M. Ambroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EDRAM REFRESH IN A HIGH PERFORMANCE CACHE ARCHITECTURE
- Publication number 20110320696
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Michael Fee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MANAGING DATAFLOW IN A TEMPORARY MEMORY
- Publication number 20110314183
- Publication date Dec 22, 2011
- International Business Machines Corporation
- Ekaterina M. Ambroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR LRU COMPARTMENT CAP...
- Publication number 20090216955
- Publication date Aug 27, 2009
- International Business Machines Corporation
- Arthur J. O'Neill, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR CACHE COHERENCY PRO...
- Publication number 20090210626
- Publication date Aug 20, 2009
- International Business Machines Corporation
- Vesselina K. Papazova
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR SELECTIVELY PURGING...
- Publication number 20090210629
- Publication date Aug 20, 2009
- International Business Machines Corporation
- Michael A. Blake
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PREVENTING LOCKOUT...
- Publication number 20090193198
- Publication date Jul 30, 2009
- International Business Machines Corporation
- Vesselina K. Papazova
- G06 - COMPUTING CALCULATING COUNTING

Arthur J. O'Neill, JR.

Person

Patents Grantslast 30 patents

Performance optimization and dynamic resource reservation for guara...

Dynamic trailing edge latency absorption for fetch data forwarded f...

Method for optimizing sequential data fetches in a computer system

Cache coherency protocol with built in avoidance for conflicting re...

Optimizing EDRAM refresh rates in a high performance cache architec...

Least recently used (LRU) compartment capture in a cache memory system

Method, system and computer program product for preventing lockout...

Patents Applicationslast 30 patents

OPTIMIZING EDRAM REFRESH RATES IN A HIGH PERFORMANCE CACHE ARCHITEC...

LOADING AND UNLOADING A MEMORY ELEMENT FOR DEBUG

DYNAMIC TRAILING EDGE LATENCY ABSORPTION FOR FETCH DATA FORWARDED F...

OPTIMIZING EDRAM REFRESH RATES IN A HIGH PERFORMANCE CACHE ARCHITEC...

METHOD FOR OPTIMIZING SEQUENTIAL DATA FETCHES IN A COMPUTER SYSTEM

MEMORY SYSTEM FOR ERROR CHECKING FETCH AND STORE DATA

HIGH PERFORMANCE CACHE DIRECTORY ERROR CORRECTION CODE

DYNAMIC RE-ALLOCATION OF CACHE BUFFER SLOTS

DYNAMIC PIPELINE CACHE ERROR CORRECTION

PERFORMANCE MONITORING IN A SHARED PIPELINE

ERROR DETECTION AND RECOVERY IN A SHARED PIPELINE

Main Memory Operations In A Symmetric Multiprocessing Computer

PERFORMANCE OPTIMIZATION AND DYNAMIC RESOURCE RESERVATION FOR GUARA...

USER-CONTROLLED TARGETED CACHE PURGE

EDRAM REFRESH IN A HIGH PERFORMANCE CACHE ARCHITECTURE

SYSTEM AND METHOD FOR MANAGING DATAFLOW IN A TEMPORARY MEMORY

METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR LRU COMPARTMENT CAP...

METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR CACHE COHERENCY PRO...

METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR SELECTIVELY PURGING...

METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PREVENTING LOCKOUT...