Arthur Peters

Person

Lawrence, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data processing system having a bus command generated by one subsys...
- Patent number 5,379,378
- Issue date Jan 3, 1995
- Bull HN Information Systems Inc.
- Arthur Peters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor system with centralized initialization, testing and...
- Patent number 5,274,797
- Issue date Dec 28, 1993
- Bull HN Information Systems Inc.
- George J. Barlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus monitor with time stamp means for independently capturing and c...
- Patent number 5,226,153
- Issue date Jul 6, 1993
- Bull HN Information Systems Inc.
- Douglas J. DeAngelis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus monitor with selective capture of independently occuring events...
- Patent number 5,210,862
- Issue date May 11, 1993
- Bull HN Information Systems Inc.
- Douglas J. DeAngelis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus monitor with means for selectively capturing trigger conditions
- Patent number 5,206,948
- Issue date Apr 27, 1993
- Bull HN Information Systems Inc.
- Douglas J. De Angelis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus monitor with dual port memory for storing selectable trigger pa...
- Patent number 5,142,673
- Issue date Aug 25, 1992
- Bull HN Information Systems Inc.
- Douglas J. De Angelis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Segment descriptor present bit recycle and detect logic for a memor...
- Patent number 4,827,400
- Issue date May 2, 1989
- Honeywell Bull Inc.
- Llewelyn S. Dunwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wrap-around logic for interprocessor communications
- Patent number 4,639,860
- Issue date Jan 27, 1987
- Honeywell Information Systems Inc.
- Arthur Peters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
FIFO buffer to cache memory
- Patent number 4,494,190
- Issue date Jan 15, 1985
- Honeywell Information Systems Inc.
- Arthur Peters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data steering logic for the output of a cache memory having an odd/...
- Patent number 4,445,172
- Issue date Apr 24, 1984
- Honeywell Information Systems Inc.
- Arthur Peters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Odd/even bank structure for a cache memory
- Patent number 4,424,561
- Issue date Jan 3, 1984
- Honeywell Information Systems Inc.
- Philip E. Stanley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Diagnostic subsystem for a cache memory
- Patent number 4,392,201
- Issue date Jul 5, 1983
- Honeywell Information Systems Inc.
- Richard P. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hit/miss logic for a cache memory
- Patent number 4,363,095
- Issue date Dec 7, 1982
- Honeywell Information Systems Inc.
- William E. Woods
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Local bus interface for controlling information transfers between u...
- Patent number 4,323,967
- Issue date Apr 6, 1982
- Honeywell Information Systems Inc.
- Arthur Peters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-evaluation system for determining the operational integrity of...
- Patent number 4,322,846
- Issue date Mar 30, 1982
- Honeywell Information Systems Inc.
- Elmer W. Carroll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for next address generation in a data processi...
- Patent number 4,309,753
- Issue date Jan 5, 1982
- Honeywell Information System Inc.
- Virendra S. Negi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic logic apparatus for a data processing system
- Patent number 4,272,828
- Issue date Jun 9, 1981
- Honeywell Information Systems Inc.
- Virendra S. Negi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Condition code accumulator apparatus for a data processing system
- Patent number 4,271,484
- Issue date Jun 2, 1981
- Honeywell Information Systems Inc.
- Arthur Peters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control file apparatus for a data processing system
- Patent number 4,258,420
- Issue date Mar 24, 1981
- Honeywell Information Systems Inc.
- Virendra S. Negi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary coded decimal correction apparatus for use in an arithmetic...
- Patent number 4,245,328
- Issue date Jan 13, 1981
- Honeywell Information Systems Inc.
- Virendra S. Negi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control store address generation logic for a data processing system
- Patent number 4,224,668
- Issue date Sep 23, 1980
- Honeywell Information Systems Inc.
- Arthur Peters
- G06 - COMPUTING CALCULATING COUNTING

Arthur Peters

Person

Patents Grantslast 30 patents

Data processing system having a bus command generated by one subsys...

Multiprocessor system with centralized initialization, testing and...

Bus monitor with time stamp means for independently capturing and c...

Bus monitor with selective capture of independently occuring events...

Bus monitor with means for selectively capturing trigger conditions

Bus monitor with dual port memory for storing selectable trigger pa...

Segment descriptor present bit recycle and detect logic for a memor...

Wrap-around logic for interprocessor communications

FIFO buffer to cache memory

Data steering logic for the output of a cache memory having an odd/...

Odd/even bank structure for a cache memory

Diagnostic subsystem for a cache memory

Hit/miss logic for a cache memory

Local bus interface for controlling information transfers between u...

Self-evaluation system for determining the operational integrity of...

Apparatus and method for next address generation in a data processi...

Arithmetic logic apparatus for a data processing system

Condition code accumulator apparatus for a data processing system

Control file apparatus for a data processing system

Binary coded decimal correction apparatus for use in an arithmetic...

Control store address generation logic for a data processing system