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Arvind Nembili Veeravalli
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Bangalore, IN
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Patents Grants
last 30 patents
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Patent Grant
System and method for performing sign-off timing analysis of electr...
Patent number
11,455,450
Issue date
Sep 27, 2022
Cadence Design Systems, Inc.
Sushobhit Singh
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus for performing sign-off timing analysis of cir...
Patent number
10,114,920
Issue date
Oct 30, 2018
Cadence Design Systems, Inc.
Umesh Gupta
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Fabricating IC with NBTI path delay within timing constraints
Patent number
8,255,850
Issue date
Aug 28, 2012
Texas Instruments Incorporated
Palkesh Jain
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
IC design flow incorporating optimal assumptions of power supply vo...
Patent number
8,051,399
Issue date
Nov 1, 2011
Texas Instruments Incorporated
Ramamurthy Vishweshwara
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
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Patent Application
DESIGN OF INTEGRATED CIRCUITS LESS SUSCEPTIBLE TO DEGRADATIONS IN T...
Publication number
20090187868
Publication date
Jul 23, 2009
TEXAS INSTRUMENTS INCORPORATED
Palkesh Jain
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
IC Design Flow Incorporating Optimal Assumptions of Power Supply Vo...
Publication number
20090125858
Publication date
May 14, 2009
TEXAS INSTRUMENTS INCORPORATED
Ramamurthy Vishweshwara
G06 - COMPUTING CALCULATING COUNTING