Arvind Raman

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Rating substrate support assemblies based on impedance circuit elec...
- Patent number 12,205,791
- Issue date Jan 21, 2025
- Applied Materials, Inc.
- Arvind Shankar Raman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software visible and controllable lock-stepping with configurable l...
- Patent number 12,086,653
- Issue date Sep 10, 2024
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified retention and wake-up clamp apparatus and method
- Patent number 12,007,826
- Issue date Jun 11, 2024
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
All-digital closed loop voltage generator
- Patent number 11,320,888
- Issue date May 3, 2022
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for in-field self testing in a diagnos...
- Patent number 10,962,596
- Issue date Mar 30, 2021
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selecting a low power state based on cache flush latency determination
- Patent number 10,963,038
- Issue date Mar 30, 2021
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for in-field self testing in a diagnos...
- Patent number 10,620,266
- Issue date Apr 14, 2020
- Intel Corporation
- Vedvyas Shanbhogue
- G01 - MEASURING TESTING
Information Patent Grant
Low power retention flip-flop with level-sensitive scan circuitry
- Patent number 10,374,584
- Issue date Aug 6, 2019
- Intel Corporation
- Charles Augustine
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Technologies for managing power during an activation cycle
- Patent number 10,261,572
- Issue date Apr 16, 2019
- Intel Corporation
- Aswin Ramachandran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selecting a low power state based on cache flush latency determination
- Patent number 10,198,065
- Issue date Feb 5, 2019
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling telemetry data communication in a processor
- Patent number 9,910,470
- Issue date Mar 6, 2018
- Intel Corporation
- Vivek Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selecting a low power state based on cache flush latency determination
- Patent number 9,665,153
- Issue date May 30, 2017
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for managing power during an activation cycle
- Patent number 9,625,984
- Issue date Apr 18, 2017
- Intel Corporation
- Aswin Ramachandran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for run-time reallocation of leakage current and...
- Patent number 9,335,813
- Issue date May 10, 2016
- Intel Corporation
- James S. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase locked loop device and method thereof
- Patent number 8,509,370
- Issue date Aug 13, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Gayathri A. Bhagavatheeswaran
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for making a semiconductor device using hardwa...
- Patent number 7,844,937
- Issue date Nov 30, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Arvind Raman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED HYBRID PREDICTIVE MONITORING OF MANUFACTURING SYSTEMS
- Publication number 20240427324
- Publication date Dec 26, 2024
- Applied Materials, Inc.
- Jimmy Iskandar
- G05 - CONTROLLING REGULATING
Information Patent Application
SOFTWARE VISIBLE AND CONTROLLABLE LOCK-STEPPING WITH CONFIGURABLE L...
- Publication number 20240370312
- Publication date Nov 7, 2024
- Intel Corporation
- Vedvyas SHANBHOGUE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENERGY CONSUMPTION MEASUREMENT
- Publication number 20240273028
- Publication date Aug 15, 2024
- Intel Corporation
- Corey D. GOUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESS CHAMBER QUALIFICATION FOR MAINTENANCE PROCESS ENDPOINT DETE...
- Publication number 20240248466
- Publication date Jul 25, 2024
- Applied Materials, Inc.
- Arvind Shankar Raman
- G05 - CONTROLLING REGULATING
Information Patent Application
PROCESSOR CORE SUBSYSTEM WITH OPEN-STANDARD NETWORK-ON-CHIP PORTS
- Publication number 20230315483
- Publication date Oct 5, 2023
- Shih Jun Chong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RATING SUBSTRATE SUPPORT ASSEMBLIES BASED ON IMPEDANCE CIRCUIT ELEC...
- Publication number 20220238300
- Publication date Jul 28, 2022
- Applied Materials, Inc.
- Arvind Shankar Raman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFTWARE VISIBLE AND CONTROLLABLE LOCK-STEPPING WITH CONFIGURABLE L...
- Publication number 20220206875
- Publication date Jun 30, 2022
- Intel Corporation
- Vedvyas SHANBHOGUE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED RETENTION AND WAKE-UP CLAMP APPARATUS AND METHOD
- Publication number 20220091652
- Publication date Mar 24, 2022
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For In-Field Self Testing In A Diagnos...
- Publication number 20200300911
- Publication date Sep 24, 2020
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALL-DIGITAL CLOSED LOOP VOLTAGE GENERATOR
- Publication number 20200081512
- Publication date Mar 12, 2020
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For In-Field Self Testing In A Diagnos...
- Publication number 20190162782
- Publication date May 30, 2019
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selecting A Low Power State Based On Cache Flush Latency Determination
- Publication number 20190155370
- Publication date May 23, 2019
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selecting A Low Power State Based On Cache Flush Latency Determination
- Publication number 20170228014
- Publication date Aug 10, 2017
- Intel Corporation
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR MANAGING POWER DURING AN ACTIVATION CYCLE
- Publication number 20170220099
- Publication date Aug 3, 2017
- Intel Corporation
- Aswin Ramachandran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Telemetry Data Communication In A Processor
- Publication number 20170177046
- Publication date Jun 22, 2017
- Intel Corporation
- Vivek Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR MANAGING POWER DURING AN ACTIVATION CYCLE
- Publication number 20160282930
- Publication date Sep 29, 2016
- Aswin Ramachandran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selecting A Low Power State Based On Cache Flush Latency Determination
- Publication number 20150268711
- Publication date Sep 24, 2015
- Sundar Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR RUN-TIME REALLOCATION OF LEAKAGE CURRENT AND...
- Publication number 20140359328
- Publication date Dec 4, 2014
- James S. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHASE LOCKED LOOP DEVICE AND METHOD THEREOF
- Publication number 20100310030
- Publication date Dec 9, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Gayathri A. Bhagavatheeswaran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR MAKING A SEMICONDUCTOR DEVICE USING HARDWA...
- Publication number 20090150843
- Publication date Jun 11, 2009
- Arvind Raman
- G06 - COMPUTING CALCULATING COUNTING

Arvind Raman

Person

Patents Grantslast 30 patents

Rating substrate support assemblies based on impedance circuit elec...

Software visible and controllable lock-stepping with configurable l...

Unified retention and wake-up clamp apparatus and method

All-digital closed loop voltage generator

System, apparatus and method for in-field self testing in a diagnos...

Selecting a low power state based on cache flush latency determination

System, apparatus and method for in-field self testing in a diagnos...

Low power retention flip-flop with level-sensitive scan circuitry

Technologies for managing power during an activation cycle

Selecting a low power state based on cache flush latency determination

Controlling telemetry data communication in a processor

Selecting a low power state based on cache flush latency determination

Technologies for managing power during an activation cycle

Method and system for run-time reallocation of leakage current and...

Phase locked loop device and method thereof

Method and apparatus for making a semiconductor device using hardwa...

Patents Applicationslast 30 patents

INTEGRATED HYBRID PREDICTIVE MONITORING OF MANUFACTURING SYSTEMS

SOFTWARE VISIBLE AND CONTROLLABLE LOCK-STEPPING WITH CONFIGURABLE L...

ENERGY CONSUMPTION MEASUREMENT

PROCESS CHAMBER QUALIFICATION FOR MAINTENANCE PROCESS ENDPOINT DETE...

PROCESSOR CORE SUBSYSTEM WITH OPEN-STANDARD NETWORK-ON-CHIP PORTS

RATING SUBSTRATE SUPPORT ASSEMBLIES BASED ON IMPEDANCE CIRCUIT ELEC...

SOFTWARE VISIBLE AND CONTROLLABLE LOCK-STEPPING WITH CONFIGURABLE L...

UNIFIED RETENTION AND WAKE-UP CLAMP APPARATUS AND METHOD

System, Apparatus And Method For In-Field Self Testing In A Diagnos...

ALL-DIGITAL CLOSED LOOP VOLTAGE GENERATOR

System, Apparatus And Method For In-Field Self Testing In A Diagnos...

Selecting A Low Power State Based On Cache Flush Latency Determination

Selecting A Low Power State Based On Cache Flush Latency Determination

TECHNOLOGIES FOR MANAGING POWER DURING AN ACTIVATION CYCLE

Controlling Telemetry Data Communication In A Processor

TECHNOLOGIES FOR MANAGING POWER DURING AN ACTIVATION CYCLE

Selecting A Low Power State Based On Cache Flush Latency Determination

METHOD AND SYSTEM FOR RUN-TIME REALLOCATION OF LEAKAGE CURRENT AND...

PHASE LOCKED LOOP DEVICE AND METHOD THEREOF

METHOD AND APPARATUS FOR MAKING A SEMICONDUCTOR DEVICE USING HARDWA...