Asher Hazanchuk

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Flexible hardware programmable scalable parallel processor
- Patent number 9,535,705
- Issue date Jan 3, 2017
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device data rate booster for digital signal proc...
- Patent number 8,977,885
- Issue date Mar 10, 2015
- Lattice Semiconductor Corporation
- Asher Hazanchuk
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital signal processing block architecture for programmable logic...
- Patent number 8,463,832
- Issue date Jun 11, 2013
- Lattice Semiconductor Corporation
- Asher Hazanchuk
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for implementing a multiplier utilizing digita...
- Patent number 7,987,222
- Issue date Jul 26, 2011
- Altera Corporation
- Asher Hazanchuk
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel samples, parallel coefficients, time division multiplexing...
- Patent number 7,688,919
- Issue date Mar 30, 2010
- Altera Corporation
- Asher Hazanchuk
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Variable fixed multipliers using memory blocks
- Patent number 7,356,554
- Issue date Apr 8, 2008
- Altera Corporation
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and systems to align outputs signals of an analog-to-digital...
- Patent number 7,348,914
- Issue date Mar 25, 2008
- Lattice Semiconductor Corporation
- Asher Hazanchuk
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for implementing efficient arithmetic circuits...
- Patent number 7,124,161
- Issue date Oct 17, 2006
- Altera Corporation
- Chang Choo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for implementing efficient arithmetic circuits...
- Patent number 7,058,675
- Issue date Jun 6, 2006
- Altera Corporation
- Chang Choo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable fixed multipliers using memory blocks
- Patent number 6,943,579
- Issue date Sep 13, 2005
- Altera Corporation
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device with soft multiplier
- Patent number 6,888,372
- Issue date May 3, 2005
- Altera Corporation
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
NEURAL NETWORKS PROCESSING UNITS FOLDING
- Publication number 20230394278
- Publication date Dec 7, 2023
- Neuronix AI Labs Inc.
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORKS PROCESSING UNITS PAIRING, SYMMETRY, AND STOP-ON-MINUS
- Publication number 20230368001
- Publication date Nov 16, 2023
- Neuronix AI Labs Inc.
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORKS PROCESSING UNITS ACTIVATION SPARSITY REMOVAL
- Publication number 20230325648
- Publication date Oct 12, 2023
- Neuronix AI Labs Inc.
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORKS PROCESSING UNITS REDUNDANCY REMOVAL
- Publication number 20230316059
- Publication date Oct 5, 2023
- Neuronix AI Labs Inc.
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORKS PROCESSING UNITS PERFORMANCE OPTIMIZATION PARALLEL...
- Publication number 20230306235
- Publication date Sep 28, 2023
- Neuronix AI Labs Inc.
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORKS PROCESSING UNITS WEIGHT SPARSITY REMOVAL
- Publication number 20230306243
- Publication date Sep 28, 2023
- Neuronix AI Labs Inc.
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORKS PROCESSING UNITS PERFORMANCE OPTIMIZATION
- Publication number 20220188611
- Publication date Jun 16, 2022
- Neuronix AI Labs Inc.
- Asher Hazanchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for implementing efficient arithmetic circuits...
- Publication number 20060277240
- Publication date Dec 7, 2006
- Chang Choo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for implementing efficient arithmetic circuits...
- Publication number 20060053192
- Publication date Mar 9, 2006
- Chang Choo
- G06 - COMPUTING CALCULATING COUNTING

Asher Hazanchuk

Person

Patents Grantslast 30 patents

Flexible hardware programmable scalable parallel processor

Programmable logic device data rate booster for digital signal proc...

Digital signal processing block architecture for programmable logic...

Method and apparatus for implementing a multiplier utilizing digita...

Parallel samples, parallel coefficients, time division multiplexing...

Variable fixed multipliers using memory blocks

Method and systems to align outputs signals of an analog-to-digital...

Apparatus and method for implementing efficient arithmetic circuits...

Apparatus and method for implementing efficient arithmetic circuits...

Variable fixed multipliers using memory blocks

Programmable logic device with soft multiplier

Patents Applicationslast 30 patents

NEURAL NETWORKS PROCESSING UNITS FOLDING

NEURAL NETWORKS PROCESSING UNITS PAIRING, SYMMETRY, AND STOP-ON-MINUS

NEURAL NETWORKS PROCESSING UNITS ACTIVATION SPARSITY REMOVAL

NEURAL NETWORKS PROCESSING UNITS REDUNDANCY REMOVAL

NEURAL NETWORKS PROCESSING UNITS PERFORMANCE OPTIMIZATION PARALLEL...

NEURAL NETWORKS PROCESSING UNITS WEIGHT SPARSITY REMOVAL

NEURAL NETWORKS PROCESSING UNITS PERFORMANCE OPTIMIZATION

Apparatus and method for implementing efficient arithmetic circuits...

Apparatus and method for implementing efficient arithmetic circuits...