Ashis Maitra

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New Delhi, IN

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Patents Grantslast 30 patents

Information Patent Grant
Flip-flop cell with configurable delay
- Patent number 9,455,691
- Issue date Sep 27, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Gaurav Goyal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time multiplexed SONET line processing
- Patent number 7,613,213
- Issue date Nov 3, 2009
- TranSwitch Corporation
- Pushkal Yadav
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
FLIP-FLOP CELL WITH CONFIGURABLE DELAY
- Publication number 20160112036
- Publication date Apr 21, 2016
- Gaurav Goyal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Time multiplexed SONET line processing
- Publication number 20060039416
- Publication date Feb 23, 2006
- Pushkal Yadav
- H04 - ELECTRIC COMMUNICATION TECHNIQUE