Ashish Alawani

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Module with internal wire fence shielding
- Patent number 10,021,790
- Issue date Jul 10, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Jin Jeong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Via structures for thermal dissipation
- Patent number 9,997,428
- Issue date Jun 12, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Marshall Maple
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of attaching components to printed cirucuit board with reduc...
- Patent number 9,865,479
- Issue date Jan 9, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Wei-Shun Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate vias for heat removal from semiconductor die
- Patent number 8,946,904
- Issue date Feb 3, 2015
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Tarak A. Railkar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF ATTACHING COMPONENTS TO PRINTED CIRUCUIT BOARD WITH REDUC...
- Publication number 20170301559
- Publication date Oct 19, 2017
- Avago Technologies General IP (Singapore) PTE. LTD.
- Wei-Shun Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MODULE WITH INTERNAL WIRE FENCE SHIELDING
- Publication number 20170251576
- Publication date Aug 31, 2017
- Avago Technologies General IP (Singapore) PTE. LTD.
- Jin Jeong
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
PRINTED CIRCUIT BOARD WITH COMPARTMENTAL SHIELDS FOR ELECTRONIC COM...
- Publication number 20170223839
- Publication date Aug 3, 2017
- Avago Technologies General IP (Singapore) PTE. LTD.
- Padam Jain
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CIRCUIT PACKAGE WITH INTERNAL AND EXTERNAL SHIELDING
- Publication number 20170127581
- Publication date May 4, 2017
- Avago Technologies General IP (Singapore) PTE. LTD.
- Domingo Figueredo
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CIRCUIT PACKAGE WITH TRENCH FEATURES TO PROVIDE INTERNAL SHIELDING...
- Publication number 20170117229
- Publication date Apr 27, 2017
- Avago Technologies General IP (Singapore) PTE. LTD.
- Nitesh Kumbhat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT PACKAGE WITH BOND WIRES TO PROVIDE INTERNAL SHIELDING BETWE...
- Publication number 20170118877
- Publication date Apr 27, 2017
- Avago Technologies General IP (Singapore) PTE. LTD.
- Nitesh Kumbhat
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CIRCUIT PACKAGE WITH SEGMENTED EXTERNAL SHIELD TO PROVIDE INTERNAL...
- Publication number 20170117230
- Publication date Apr 27, 2017
- Avago Technologies General IP (Singapore) PTE. LTD.
- Nitesh Kumbhat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA STRUCTURES FOR THERMAL DISSIPATION
- Publication number 20170018501
- Publication date Jan 19, 2017
- Avago Technologies General IP (Singapore) PTE. LTD.
- Marshall Maple
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA STRUCTURES FOR THERMAL DISSIPATION
- Publication number 20170018478
- Publication date Jan 19, 2017
- Avago Technologies General IP (Singapore) PTE. LTD.
- Marshall Maple
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE VIAS FOR HEAT REMOVAL FROM SEMICONDUCTOR DIE
- Publication number 20120049345
- Publication date Mar 1, 2012
- Avago Technologies Wireless IP (Singapore) Pte. Ltd.
- Tarak A. Railkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Increased interconnect density electronic package and method of fab...
- Publication number 20070257375
- Publication date Nov 8, 2007
- James P. Roland
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Ashish Alawani

Person

Patents Grantslast 30 patents

Module with internal wire fence shielding

Via structures for thermal dissipation

Method of attaching components to printed cirucuit board with reduc...

Substrate vias for heat removal from semiconductor die

Patents Applicationslast 30 patents

METHOD OF ATTACHING COMPONENTS TO PRINTED CIRUCUIT BOARD WITH REDUC...

MODULE WITH INTERNAL WIRE FENCE SHIELDING

PRINTED CIRCUIT BOARD WITH COMPARTMENTAL SHIELDS FOR ELECTRONIC COM...

CIRCUIT PACKAGE WITH INTERNAL AND EXTERNAL SHIELDING

CIRCUIT PACKAGE WITH TRENCH FEATURES TO PROVIDE INTERNAL SHIELDING...

CIRCUIT PACKAGE WITH BOND WIRES TO PROVIDE INTERNAL SHIELDING BETWE...

CIRCUIT PACKAGE WITH SEGMENTED EXTERNAL SHIELD TO PROVIDE INTERNAL...

VIA STRUCTURES FOR THERMAL DISSIPATION

VIA STRUCTURES FOR THERMAL DISSIPATION

SUBSTRATE VIAS FOR HEAT REMOVAL FROM SEMICONDUCTOR DIE

Increased interconnect density electronic package and method of fab...