Ashwin Raghunathan

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit for detecting a voltage change using a time-to-digital conv...
- Patent number 8,669,794
- Issue date Mar 11, 2014
- QUALCOMM Incorporated
- Sang Wook Park
- G01 - MEASURING TESTING
Information Patent Grant
Supply-regulated VCO architecture
- Patent number 8,362,848
- Issue date Jan 29, 2013
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay line that tracks setup time of a latching element over PVT
- Patent number 8,363,485
- Issue date Jan 29, 2013
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLL charge pump with reduced coupling to bias nodes
- Patent number 8,330,511
- Issue date Dec 11, 2012
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for minimizing control voltage noise due to charge pump...
- Patent number 8,164,369
- Issue date Apr 24, 2012
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Recalibration systems and techniques for electronic memory applicat...
- Patent number 8,159,888
- Issue date Apr 17, 2012
- QUALCOMM Incorporated
- Ashwin Raghunathan
- G11 - INFORMATION STORAGE
Information Patent Grant
Supply-regulated phase-locked loop (PLL) and method of using
- Patent number 7,973,612
- Issue date Jul 5, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for minimizing control voltage ripple due to charge pump...
- Patent number 7,932,757
- Issue date Apr 26, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Periodic timing jitter reduction in oscillatory systems
- Patent number 7,880,554
- Issue date Feb 1, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT FOR DETECTING A VOLTAGE CHANGE USING A TIME-TO-DIGITAL CONV...
- Publication number 20130214831
- Publication date Aug 22, 2013
- QUALCOMM Incorporated
- Sang Wook Park
- G01 - MEASURING TESTING
Information Patent Application
INJECTION-LOCKING A SLAVE OSCILLATOR TO A MASTER OSCILLATOR WITH NO...
- Publication number 20130033331
- Publication date Feb 7, 2013
- QUALCOMM Incorporated
- Ashwin RAGHUNATHAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SUPPLY-REGULATED VCO ARCHITECTURE
- Publication number 20120256693
- Publication date Oct 11, 2012
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PLL CHARGE PUMP WITH REDUCED COUPLING TO BIAS NODES
- Publication number 20110254615
- Publication date Oct 20, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Recalibration Systems and Techniques for Electronic Memory Applicat...
- Publication number 20110211404
- Publication date Sep 1, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- G11 - INFORMATION STORAGE
Information Patent Application
DELAY LINE THAT TRACKS SETUP TIME OF A LATCHING ELEMENT OVER PVT
- Publication number 20110063929
- Publication date Mar 17, 2011
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Supply-Regulated Phase-Locked Loop (PLL) and Method of Using
- Publication number 20100271140
- Publication date Oct 28, 2010
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PERIODIC TIMING JIPERIODIC TIMING JITTER REDUCTION IN OSCILLATORY S...
- Publication number 20100194471
- Publication date Aug 5, 2010
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE RIPPLE DUE TO CHARGE PUMP...
- Publication number 20100117700
- Publication date May 13, 2010
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE NOISE DUE TO CHARGE PUMP...
- Publication number 20100117701
- Publication date May 13, 2010
- QUALCOMM Incorporated
- Ashwin Raghunathan
- H03 - BASIC ELECTRONIC CIRCUITRY

Ashwin Raghunathan

Person

Patents Grantslast 30 patents

Circuit for detecting a voltage change using a time-to-digital conv...

Supply-regulated VCO architecture

Delay line that tracks setup time of a latching element over PVT

PLL charge pump with reduced coupling to bias nodes

Techniques for minimizing control voltage noise due to charge pump...

Recalibration systems and techniques for electronic memory applicat...

Supply-regulated phase-locked loop (PLL) and method of using

Techniques for minimizing control voltage ripple due to charge pump...

Periodic timing jitter reduction in oscillatory systems

Patents Applicationslast 30 patents

CIRCUIT FOR DETECTING A VOLTAGE CHANGE USING A TIME-TO-DIGITAL CONV...

INJECTION-LOCKING A SLAVE OSCILLATOR TO A MASTER OSCILLATOR WITH NO...

SUPPLY-REGULATED VCO ARCHITECTURE

PLL CHARGE PUMP WITH REDUCED COUPLING TO BIAS NODES

Recalibration Systems and Techniques for Electronic Memory Applicat...

DELAY LINE THAT TRACKS SETUP TIME OF A LATCHING ELEMENT OVER PVT

Supply-Regulated Phase-Locked Loop (PLL) and Method of Using

PERIODIC TIMING JIPERIODIC TIMING JITTER REDUCTION IN OSCILLATORY S...

TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE RIPPLE DUE TO CHARGE PUMP...

TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE NOISE DUE TO CHARGE PUMP...