Avnish Varma

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Noida, IN

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Patents Grantslast 30 patents

Information Patent Grant
Critical path aware voltage drop analysis of an integrated circuit
- Patent number 10,540,464
- Issue date Jan 21, 2020
- Cadence Design Systems, Inc.
- Suketu Desai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface modeling for power analysis of an integrated circuit
- Patent number 10,515,174
- Issue date Dec 24, 2019
- Cadence Design Systems, Inc.
- Avnish Varma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for modeling integrated clock gates activity fo...
- Patent number 10,387,595
- Issue date Aug 20, 2019
- Cadence Design Systems, Inc.
- Anshu Mani
- G06 - COMPUTING CALCULATING COUNTING