Axel Brintzinger

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Arrangement for the protection of three-dimensional structures on w...
- Patent number 7,514,798
- Issue date Apr 7, 2009
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for producing layer structures for signal distribution
- Patent number 7,393,782
- Issue date Jul 1, 2008
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a rewiring printed circuit board
- Patent number 7,390,742
- Issue date Jun 24, 2008
- Infineon Technologies AG
- Axel Brintzinger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electronic component with compliant elevations having electrical co...
- Patent number 7,368,375
- Issue date May 6, 2008
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming three-dimensional structures on a substrate
- Patent number 7,335,591
- Issue date Feb 26, 2008
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for improving the mechanical properties of BOC module arrang...
- Patent number 7,332,430
- Issue date Feb 19, 2008
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for producing metallic interconnects and contact surfaces o...
- Patent number 7,271,095
- Issue date Sep 18, 2007
- Infineon Technologies AG
- Axel Brintzinger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Arrangement and process for protecting fuses/anti-fuses
- Patent number 7,235,859
- Issue date Jun 26, 2007
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating metallic interconnects on electronic components
- Patent number 7,172,966
- Issue date Feb 6, 2007
- Infineon Technologies AG
- Axel Brintzinger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Connection between a semiconductor chip and an external conductor s...
- Patent number 7,169,647
- Issue date Jan 30, 2007
- Infineon Technologies AG
- Octavio Trovarelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for protecting the redistribution layer on wafers/chips
- Patent number 7,115,496
- Issue date Oct 3, 2006
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing of a corrosion protected interconnect on a substrate
- Patent number 6,943,101
- Issue date Sep 13, 2005
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for the solder-stop structuring of elevations on wafers
- Patent number 6,919,264
- Issue date Jul 19, 2005
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method for an interconnect on a substrate
- Patent number 6,911,390
- Issue date Jun 28, 2005
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus for providing an antifuse function
- Patent number 6,882,027
- Issue date Apr 19, 2005
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bond pad structure comprising tungsten or tungsten compound layer o...
- Patent number 6,866,943
- Issue date Mar 15, 2005
- Infineon Technologies AG
- Gerald Friese
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of eliminating back-end rerouting in ball grid array packaging
- Patent number 6,720,212
- Issue date Apr 13, 2004
- Infineon Technologies AG
- Werner Robl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming a structure on a wafer
- Patent number 6,638,870
- Issue date Oct 28, 2003
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a self-aligned antifuse link
- Patent number 6,465,282
- Issue date Oct 15, 2002
- Infineon Technologies AG
- Dirk Többen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating an integrated circuit, in particular an anti...
- Patent number 6,458,631
- Issue date Oct 1, 2002
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method for producing a rewiring printed circuit board
- Publication number 20060121257
- Publication date Jun 8, 2006
- Axel Brintzinger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Process for producing a chip arrangement provided with a molding co...
- Publication number 20050277230
- Publication date Dec 15, 2005
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Arrangement for reducing the electrical crosstalk on a chip
- Publication number 20050275085
- Publication date Dec 15, 2005
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Arrangement and process for protecting fuses/anti-fuses
- Publication number 20050258506
- Publication date Nov 24, 2005
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for producing layer structures for signal distribution
- Publication number 20050191837
- Publication date Sep 1, 2005
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for producing metallic interconnects and contact surfaces o...
- Publication number 20050186772
- Publication date Aug 25, 2005
- Axel Brintzinger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method for fabricating metallic interconnects on electronic components
- Publication number 20050186786
- Publication date Aug 25, 2005
- Axel Brintzinger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Electronic component with compliant elevations having electrical co...
- Publication number 20050127521
- Publication date Jun 16, 2005
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for improving the mechanical properties of BOC module arrang...
- Publication number 20040259290
- Publication date Dec 23, 2004
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Connection between a semiconductor chip and an external conductor s...
- Publication number 20040248341
- Publication date Dec 9, 2004
- Octavio Trovarelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for protecting the redistribution layer on wafers/chips
- Publication number 20040248343
- Publication date Dec 9, 2004
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and apparatus for providing an antifuse function
- Publication number 20040238919
- Publication date Dec 2, 2004
- Infineon Technologies North America Corp.
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming three-dimensional structures on a substrate
- Publication number 20040166670
- Publication date Aug 26, 2004
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Arrangement for the protection of three-dimensional structures on w...
- Publication number 20040135252
- Publication date Jul 15, 2004
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for the solder-stop structuring of elevations on wafers
- Publication number 20040087131
- Publication date May 6, 2004
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOND PAD STRUCTURE COMPRISING TUNGSTEN OR TUNGSTEN COMPOUND LAYER O...
- Publication number 20030203216
- Publication date Oct 30, 2003
- Infineon Technologies North America Corp.
- Gerald Friese
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of eliminating back-end rerouting in ball grid array packaging
- Publication number 20030183913
- Publication date Oct 2, 2003
- Infineon Technologies North America Corp.
- Werner Robl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming a structure on a wafer
- Publication number 20030129841
- Publication date Jul 10, 2003
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnect on a substrate
- Publication number 20030127743
- Publication date Jul 10, 2003
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fabrication method for an interconnect on a substrate
- Publication number 20030092274
- Publication date May 15, 2003
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING AN INTEGRATED CIRCUIT, IN PARTICULAR AN ANTI...
- Publication number 20020155678
- Publication date Oct 24, 2002
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS

Axel Brintzinger

Person

Patents Grantslast 30 patents

Arrangement for the protection of three-dimensional structures on w...

Process for producing layer structures for signal distribution

Method for producing a rewiring printed circuit board

Electronic component with compliant elevations having electrical co...

Method for forming three-dimensional structures on a substrate

Method for improving the mechanical properties of BOC module arrang...

Process for producing metallic interconnects and contact surfaces o...

Arrangement and process for protecting fuses/anti-fuses

Method for fabricating metallic interconnects on electronic components

Connection between a semiconductor chip and an external conductor s...

Method for protecting the redistribution layer on wafers/chips

Manufacturing of a corrosion protected interconnect on a substrate

Method for the solder-stop structuring of elevations on wafers

Fabrication method for an interconnect on a substrate

Methods and apparatus for providing an antifuse function

Bond pad structure comprising tungsten or tungsten compound layer o...

Method of eliminating back-end rerouting in ball grid array packaging

Forming a structure on a wafer

Method of forming a self-aligned antifuse link

Method for fabricating an integrated circuit, in particular an anti...

Patents Applicationslast 30 patents

Method for producing a rewiring printed circuit board

Process for producing a chip arrangement provided with a molding co...

Arrangement for reducing the electrical crosstalk on a chip

Arrangement and process for protecting fuses/anti-fuses

Process for producing layer structures for signal distribution

Process for producing metallic interconnects and contact surfaces o...

Method for fabricating metallic interconnects on electronic components

Electronic component with compliant elevations having electrical co...

Method for improving the mechanical properties of BOC module arrang...

Connection between a semiconductor chip and an external conductor s...

Method for protecting the redistribution layer on wafers/chips

Methods and apparatus for providing an antifuse function

Method for forming three-dimensional structures on a substrate

Arrangement for the protection of three-dimensional structures on w...

Method for the solder-stop structuring of elevations on wafers

BOND PAD STRUCTURE COMPRISING TUNGSTEN OR TUNGSTEN COMPOUND LAYER O...

Method of eliminating back-end rerouting in ball grid array packaging

Forming a structure on a wafer

Interconnect on a substrate

Fabrication method for an interconnect on a substrate

METHOD FOR FABRICATING AN INTEGRATED CIRCUIT, IN PARTICULAR AN ANTI...