Ayan Mandal

Person

Bengaluru, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatuses, methods, and systems for dynamic bypassing of last lev...
- Patent number 12,130,739
- Issue date Oct 29, 2024
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic inclusive last level cache
- Patent number 12,111,762
- Issue date Oct 8, 2024
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-efficient last level cache architecture
- Patent number 10,776,270
- Issue date Sep 15, 2020
- Intel Corporation
- Jayesh Gaur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic fill policy for a shared cache
- Patent number 10,229,059
- Issue date Mar 12, 2019
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-efficient last level cache architecture
- Patent number 10,162,756
- Issue date Dec 25, 2018
- Intel Corporation
- Jayesh Gaur
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Leveraging System Cache for Performance Cores
- Publication number 20240220410
- Publication date Jul 4, 2024
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE ACCESS FABRIC
- Publication number 20230315642
- Publication date Oct 5, 2023
- Intel Corporation
- Leon POLISHUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE, SYSTEM AND METHOD FOR PROVIDING A HIGH AFFINITY SNOOP FILTER
- Publication number 20230305960
- Publication date Sep 28, 2023
- Intel Corporation
- Leon Polishuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC INCLUSIVE LAST LEVEL CACHE
- Publication number 20220197797
- Publication date Jun 23, 2022
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE RE-USE PROCESSOR CACHE POLICY
- Publication number 20220197798
- Publication date Jun 23, 2022
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, METHODS, AND SYSTEMS FOR DYNAMIC BYPASSING OF LAST LEV...
- Publication number 20210303467
- Publication date Sep 30, 2021
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-EFFICIENT LAST LEVEL CACHE ARCHITECTURE
- Publication number 20190243760
- Publication date Aug 8, 2019
- Intel Corporation
- Jayesh Gaur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC FILL POLICY FOR A SHARED CACHE
- Publication number 20180285261
- Publication date Oct 4, 2018
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-EFFICIENT LAST LEVEL CACHE ARCHITECTURE
- Publication number 20180203799
- Publication date Jul 19, 2018
- Intel Corporation
- Jayesh Gaur
- G06 - COMPUTING CALCULATING COUNTING

Ayan Mandal

Person

Patents Grantslast 30 patents

Apparatuses, methods, and systems for dynamic bypassing of last lev...

Dynamic inclusive last level cache

Memory-efficient last level cache architecture

Dynamic fill policy for a shared cache

Memory-efficient last level cache architecture

Patents Applicationslast 30 patents

Leveraging System Cache for Performance Cores

CACHE ACCESS FABRIC

DEVICE, SYSTEM AND METHOD FOR PROVIDING A HIGH AFFINITY SNOOP FILTER

DYNAMIC INCLUSIVE LAST LEVEL CACHE

SINGLE RE-USE PROCESSOR CACHE POLICY

APPARATUSES, METHODS, AND SYSTEMS FOR DYNAMIC BYPASSING OF LAST LEV...

MEMORY-EFFICIENT LAST LEVEL CACHE ARCHITECTURE

DYNAMIC FILL POLICY FOR A SHARED CACHE

MEMORY-EFFICIENT LAST LEVEL CACHE ARCHITECTURE