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Balbeer Singh Rathor
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Morena, IN
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last 30 patents
Information
Patent Grant
Reference voltage training scheme
Patent number
11,580,048
Issue date
Feb 14, 2023
Cadence Designs Systems, Inc.
Thomas E. Wilson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Multi-tap hybrid equalization scheme for 24GBPS GDDR6 memory interf...
Patent number
11,082,267
Issue date
Aug 3, 2021
Cadence Design Systems, Inc.
Vinod Kumar
G11 - INFORMATION STORAGE
Information
Patent Grant
Time based feed forward equalization (TFFE) for high-speed DDR tran...
Patent number
10,848,352
Issue date
Nov 24, 2020
Cadence Design Systems, Inc.
Balbeer Singh Rathor
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Methods and devices for high-sensitivity memory interface receiver
Patent number
9,767,888
Issue date
Sep 19, 2017
Cadence Design Systems, Inc.
Hari Anand Ravi
H03 - BASIC ELECTRONIC CIRCUITRY