Bardo Muller

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Dreieich, DE

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Patents Grantslast 30 patents

Information Patent Grant
Phase-locked loop circuit
- Patent number 7,440,518
- Issue date Oct 21, 2008
- Fujitsu Limited
- Bernd Germann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous frequency dividers and components therefor
- Patent number 7,298,811
- Issue date Nov 20, 2007
- Fujitsu Limited
- Bardo Müller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Variable frequency synthesizer comprising a sigma-delta modulator
- Patent number 7,081,798
- Issue date Jul 25, 2006
- Fujitsu Limited
- Bardo Müller
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Synchronous frequency dividers and components therefor
- Publication number 20060170464
- Publication date Aug 3, 2006
- FUJITSU LIMITED
- Bardo Muller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Variable frequency synthesizer comprising a sigma-delta modulator
- Publication number 20060055469
- Publication date Mar 16, 2006
- FUJITSU LIMITED
- Bardo Muller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Phase-locked loop circuit
- Publication number 20060039516
- Publication date Feb 23, 2006
- FUJITSU LIMITED
- Bernd Germann
- H03 - BASIC ELECTRONIC CIRCUITRY