Bart J. Martinec

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Austin, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Programmable clock divider
- Patent number 8,004,319
- Issue date Aug 23, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Bhoodev Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Testing of data retention latches in circuit devices
- Patent number 7,346,820
- Issue date Mar 18, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Milind P. Padhye
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Programmable Clock Divider
- Publication number 20110128051
- Publication date Jun 2, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Bhoodev Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Testing of data retention latches in circuit devices
- Publication number 20070226561
- Publication date Sep 27, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Milind P. Padhye
- G01 - MEASURING TESTING