Bart Reynolds

Person

Seattle, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Constructing a model of a programmable logic device
- Patent number 7,584,448
- Issue date Sep 1, 2009
- Xilinx, Inc.
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining networks of a tile module of a programmable logic device
- Patent number 7,536,668
- Issue date May 19, 2009
- Xilinx, Inc.
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Comparing graphical and netlist connections of a programmable logic...
- Patent number 7,472,370
- Issue date Dec 30, 2008
- Xilinx, Inc.
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining controlling pins for a tile module of a programmable lo...
- Patent number 7,451,425
- Issue date Nov 11, 2008
- Xilinx, Inc.
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining reachable pins of a network of a programmable logic device
- Patent number 7,451,420
- Issue date Nov 11, 2008
- Xilinx, Inc.
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining indices of configuration memory cell modules of a progr...
- Patent number 7,451,423
- Issue date Nov 11, 2008
- Xilinx, Inc.
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining programmable connections through a switchbox of a progr...
- Patent number 7,451,424
- Issue date Nov 11, 2008
- Xilinx, Inc.
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for specifying addressability and bus connecti...
- Patent number 6,910,002
- Issue date Jun 21, 2005
- Xilinx, Inc.
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable interface for a configurable system bus
- Patent number 6,754,760
- Issue date Jun 22, 2004
- Xilinx, Inc.
- Wilson Yee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for determining the width of a memory subsystem
- Patent number 6,704,850
- Issue date Mar 9, 2004
- Triscend Corporation
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bidirectional bus for use as an interconnect routing resource
- Patent number 6,661,812
- Issue date Dec 9, 2003
- Triscend Corporation
- Bart Reynolds
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for specifying address offsets and alignment i...
- Patent number 6,658,547
- Issue date Dec 2, 2003
- Triscend Corporation
- Bart Reynolds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable processor system unit
- Patent number 6,467,009
- Issue date Oct 15, 2002
- Triscend Corporation
- Steven Paul Winegarden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure and method for manually controlling automatic configurati...
- Patent number 5,448,493
- Issue date Sep 5, 1995
- Xilinx, Inc.
- Todd J. Topolewski
- G06 - COMPUTING CALCULATING COUNTING

Bart Reynolds

Person

Patents Grantslast 30 patents

Constructing a model of a programmable logic device

Determining networks of a tile module of a programmable logic device

Comparing graphical and netlist connections of a programmable logic...

Determining controlling pins for a tile module of a programmable lo...

Determining reachable pins of a network of a programmable logic device

Determining indices of configuration memory cell modules of a progr...

Determining programmable connections through a switchbox of a progr...

Method and apparatus for specifying addressability and bus connecti...

Programmable interface for a configurable system bus

Method and apparatus for determining the width of a memory subsystem

Bidirectional bus for use as an interconnect routing resource

Method and apparatus for specifying address offsets and alignment i...

Configurable processor system unit

Structure and method for manually controlling automatic configurati...