Bastien Giraud

Person

Sanary Sur Mer, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Write method for differential resistive memories
- Patent number 12,119,059
- Issue date Oct 15, 2024
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bastien Giraud
- G11 - INFORMATION STORAGE
Information Patent Grant
Electroforming process using an inversion-invariant linear ECC, and...
- Patent number 12,046,284
- Issue date Jul 23, 2024
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bastien Giraud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for detection of predominant data in a memory cell
- Patent number 11,043,248
- Issue date Jun 22, 2021
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit
- Patent number 10,910,040
- Issue date Feb 2, 2021
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit capable of implementing calculation operations
- Patent number 10,811,087
- Issue date Oct 20, 2020
- Commissariat A'Lenergie Atomique et aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioned memory circuit capable of implementing calculation oper...
- Patent number 10,803,927
- Issue date Oct 13, 2020
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Grant
3D SRAM circuit with double gate transistors with improved layout
- Patent number 10,741,565
- Issue date Aug 11, 2020
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Francois Andrieu
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for writing data to a resistive memory
- Patent number 10,559,355
- Issue date Feb 11, 2020
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Michel Harrand
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with unipolar resistive memory cells with programmabl...
- Patent number 10,297,319
- Issue date May 21, 2019
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bastien Giraud
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit comprising transistors with different threshold...
- Patent number 9,911,737
- Issue date Mar 6, 2018
- STMicroelectronics S.A.
- Bastien Giraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device with SRAM memory cells including means for polarizing wells...
- Patent number 9,542,996
- Issue date Jan 10, 2017
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable-resistance non-volatile memory
- Patent number 9,508,434
- Issue date Nov 29, 2016
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Thomas-Medhi Benoist
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for controlling an integrated circuit
- Patent number 9,479,168
- Issue date Oct 25, 2016
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bastien Giraud
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Device and method for writing data to a resistive memory
- Patent number 9,449,688
- Issue date Sep 20, 2016
- Commissariat a l'Energie Atomique et aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Transistor with coupled gate and ground plane
- Patent number 9,136,366
- Issue date Sep 15, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bastien Giraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for generating a topography of an FDSOI integrated circuit
- Patent number 9,092,590
- Issue date Jul 28, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bastien Giraud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit using FDSOI technology, with well sharing and me...
- Patent number 9,093,499
- Issue date Jul 28, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit comprising a clock tree cell
- Patent number 9,000,840
- Issue date Apr 7, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Yvain Thonnart
- G05 - CONTROLLING REGULATING
Information Patent Grant
Self-contained integrated circuit including adjacent cells of diffe...
- Patent number 8,969,967
- Issue date Mar 3, 2015
- Commissariat a l'Energie et aux Energies Alternatives
- Jean-Philippe Noel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit comprising a clock tree cell
- Patent number 8,937,505
- Issue date Jan 20, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bastien Giraud
- G05 - CONTROLLING REGULATING
Information Patent Grant
Silicon-on-insulator CMOS integrated circuit with multiple threshol...
- Patent number 8,482,070
- Issue date Jul 9, 2013
- STMicroelectronics (Crolles 2)
- Philippe Flatresse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SRAM memory cell with double gate transistors provided means to imp...
- Patent number 8,320,198
- Issue date Nov 27, 2012
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Grant
Asymmetrical SRAM cell with 4 double-gate transistors
- Patent number 7,733,688
- Issue date Jun 8, 2010
- Commissariat a l'Energie Atomique
- Bastien Giraud
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT FOR GENERATING A REFERENCE VOLTAGE
- Publication number 20240385636
- Publication date Nov 21, 2024
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Anass SAMIR
- G05 - CONTROLLING REGULATING
Information Patent Application
SRAM MEMORY WITH RANDOM DETERMINISTIC INITIALIZATION
- Publication number 20240203487
- Publication date Jun 20, 2024
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe NOEL
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM WITH PUF DEDICATED SECTOR STANDING-BY
- Publication number 20240203485
- Publication date Jun 20, 2024
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe NOEL
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRONIC CIRCUIT WITH RRAM CELLS
- Publication number 20240135991
- Publication date Apr 25, 2024
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Mona EZZADEEN
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE FOR DRIVING TRANSISTORS AND METHOD OF DRIVING
- Publication number 20230413581
- Publication date Dec 21, 2023
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Bastien GIRAUD
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE METHOD FOR DIFFERENTIAL RESISTIVE MEMORIES
- Publication number 20230207006
- Publication date Jun 29, 2023
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Bastien GIRAUD
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTROFORMING PROCESS USING AN INVERSION-INVARIANT LINEAR ECC, AND...
- Publication number 20230205625
- Publication date Jun 29, 2023
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Bastien GIRAUD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM WITH RECONFIGURABLE SETTING
- Publication number 20230127142
- Publication date Apr 27, 2023
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe NOEL
- G11 - INFORMATION STORAGE
Information Patent Application
NEUROMORPHIC CIRCUIT BASED ON 2T2R RRAM CELLS
- Publication number 20230059091
- Publication date Feb 23, 2023
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Mona EZZADEEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR THE CONCEPTION OF A COMPUTATIONAL MEMORY CIRCUIT
- Publication number 20230047801
- Publication date Feb 16, 2023
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D MEMORY DEVICE COMPRISING SRAM TYPE MEMORY CELLS WITH ADJUSTABLE...
- Publication number 20210167072
- Publication date Jun 3, 2021
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Adam MAKOSIEJ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT FOR DETECTION OF PREDOMINANT DATA IN A MEMORY CELL
- Publication number 20200227098
- Publication date Jul 16, 2020
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe NOEL
- G11 - INFORMATION STORAGE
Information Patent Application
3D INTEGRATED CIRCUIT RANDOM-ACCESS MEMORY
- Publication number 20200185392
- Publication date Jun 11, 2020
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Adam MAKOSIEJ
- G11 - INFORMATION STORAGE
Information Patent Application
3D SRAM CIRCUIT WITH DOUBLE GATE TRANSISTORS WITH IMPROVED LAYOUT
- Publication number 20190312039
- Publication date Oct 10, 2019
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Francois Andrieu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CIRCUIT
- Publication number 20190198094
- Publication date Jun 27, 2019
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Application
PARTITIONED MEMORY CIRCUIT CAPABLE OF IMPLEMENTING
- Publication number 20190189198
- Publication date Jun 20, 2019
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Application
Memory circuit capable of implementing calculation operations
- Publication number 20190189199
- Publication date Jun 20, 2019
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM CELL
- Publication number 20180277197
- Publication date Sep 27, 2018
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- G11 - INFORMATION STORAGE
Information Patent Application
UNIPOLAR RESISTIVE MEMORY
- Publication number 20170316825
- Publication date Nov 2, 2017
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Bastien Giraud
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH MEMORY CELLS SRAM (STATIC RANDOM ACCESS MEMORIES...
- Publication number 20160078924
- Publication date Mar 17, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Olivier THOMAS
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD FOR WRITING DATA TO A RESISTIVE MEMORY
- Publication number 20160071589
- Publication date Mar 10, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Olivier Thomas
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD FOR WRITING DATA TO A RESISTIVE MEMORY
- Publication number 20160071588
- Publication date Mar 10, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Michel Harrand
- G11 - INFORMATION STORAGE
Information Patent Application
MEMOIRE NON VOLATILE A RESISTANCE PROGRAMMABLE
- Publication number 20160027509
- Publication date Jan 28, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Thomas-Medhi BENOIST
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT COMPRISING TRANSISTORS WITH DIFFERENT THRESHOLD...
- Publication number 20150287722
- Publication date Oct 8, 2015
- STMicroelectronics S.A.
- Bastien Giraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR CONTROLLING AN INTEGRATED CIRCUIT
- Publication number 20140292374
- Publication date Oct 2, 2014
- Bastien Giraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor with coupled gate and ground plane
- Publication number 20140231916
- Publication date Aug 21, 2014
- Bastien Giraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT COMPRISING A CLOCK TREE CELL
- Publication number 20140176216
- Publication date Jun 26, 2014
- Yvain Thonnart
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT COMPRISING A CLOCK TREE CELL
- Publication number 20140176228
- Publication date Jun 26, 2014
- Bastien Giraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR GENERATING A TOPOGRAPHY OF AN FDSOI INTEGRATED CIRCUIT
- Publication number 20140173544
- Publication date Jun 19, 2014
- Bastien Giraud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-CONTAINED INTEGRATED CIRCUIT INCLUDING ADJACENT CELLS OF DIFFE...
- Publication number 20140077300
- Publication date Mar 20, 2014
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Philippe Noel
- H01 - BASIC ELECTRIC ELEMENTS

Bastien Giraud

Person

Patents Grantslast 30 patents

Write method for differential resistive memories

Electroforming process using an inversion-invariant linear ECC, and...

Circuit for detection of predominant data in a memory cell

Memory circuit

Memory circuit capable of implementing calculation operations

Partitioned memory circuit capable of implementing calculation oper...

3D SRAM circuit with double gate transistors with improved layout

Device and method for writing data to a resistive memory

Memory device with unipolar resistive memory cells with programmabl...

Integrated circuit comprising transistors with different threshold...

Device with SRAM memory cells including means for polarizing wells...

Programmable-resistance non-volatile memory

Method for controlling an integrated circuit

Device and method for writing data to a resistive memory

Transistor with coupled gate and ground plane

Method for generating a topography of an FDSOI integrated circuit

Integrated circuit using FDSOI technology, with well sharing and me...

Integrated circuit comprising a clock tree cell

Self-contained integrated circuit including adjacent cells of diffe...

Integrated circuit comprising a clock tree cell

Silicon-on-insulator CMOS integrated circuit with multiple threshol...

SRAM memory cell with double gate transistors provided means to imp...

Asymmetrical SRAM cell with 4 double-gate transistors

Patents Applicationslast 30 patents

CIRCUIT FOR GENERATING A REFERENCE VOLTAGE

SRAM MEMORY WITH RANDOM DETERMINISTIC INITIALIZATION

SRAM WITH PUF DEDICATED SECTOR STANDING-BY

ELECTRONIC CIRCUIT WITH RRAM CELLS

DEVICE FOR DRIVING TRANSISTORS AND METHOD OF DRIVING

WRITE METHOD FOR DIFFERENTIAL RESISTIVE MEMORIES

ELECTROFORMING PROCESS USING AN INVERSION-INVARIANT LINEAR ECC, AND...

SRAM WITH RECONFIGURABLE SETTING

NEUROMORPHIC CIRCUIT BASED ON 2T2R RRAM CELLS

METHOD AND DEVICE FOR THE CONCEPTION OF A COMPUTATIONAL MEMORY CIRCUIT

3D MEMORY DEVICE COMPRISING SRAM TYPE MEMORY CELLS WITH ADJUSTABLE...

CIRCUIT FOR DETECTION OF PREDOMINANT DATA IN A MEMORY CELL

3D INTEGRATED CIRCUIT RANDOM-ACCESS MEMORY

3D SRAM CIRCUIT WITH DOUBLE GATE TRANSISTORS WITH IMPROVED LAYOUT

MEMORY CIRCUIT

PARTITIONED MEMORY CIRCUIT CAPABLE OF IMPLEMENTING

Memory circuit capable of implementing calculation operations

SRAM CELL

UNIPOLAR RESISTIVE MEMORY

MEMORY DEVICE WITH MEMORY CELLS SRAM (STATIC RANDOM ACCESS MEMORIES...

DEVICE AND METHOD FOR WRITING DATA TO A RESISTIVE MEMORY

DEVICE AND METHOD FOR WRITING DATA TO A RESISTIVE MEMORY

MEMOIRE NON VOLATILE A RESISTANCE PROGRAMMABLE

INTEGRATED CIRCUIT COMPRISING TRANSISTORS WITH DIFFERENT THRESHOLD...

METHOD FOR CONTROLLING AN INTEGRATED CIRCUIT

Transistor with coupled gate and ground plane

INTEGRATED CIRCUIT COMPRISING A CLOCK TREE CELL

INTEGRATED CIRCUIT COMPRISING A CLOCK TREE CELL

METHOD FOR GENERATING A TOPOGRAPHY OF AN FDSOI INTEGRATED CIRCUIT

SELF-CONTAINED INTEGRATED CIRCUIT INCLUDING ADJACENT CELLS OF DIFFE...