Ben J. Ashbaugh

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-tile graphics processing unit
- Patent number 12,367,540
- Issue date Jul 22, 2025
- Intel Corporation
- Michal Mrozek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implicit fence for write messages
- Patent number 12,321,310
- Issue date Jun 3, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing native support for generic pointers in a graphics process...
- Patent number 12,299,766
- Issue date May 13, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile graphics processing unit
- Patent number 12,217,327
- Issue date Feb 4, 2025
- Intel Corporation
- Michal Mrozek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 12,198,221
- Issue date Jan 14, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent multi-datatype execution within a processing resource
- Patent number 12,175,252
- Issue date Dec 24, 2024
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Barrier state save and restore for preemption in a graphics environ...
- Patent number 12,164,952
- Issue date Dec 10, 2024
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimizations for low precision machine learning operations
- Patent number 12,148,063
- Issue date Nov 19, 2024
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 12,117,962
- Issue date Oct 15, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor operation scheduling for deterministic latency
- Patent number 12,079,155
- Issue date Sep 3, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression of machine learning models utilizing pseudo-labeled dat...
- Patent number 12,056,906
- Issue date Aug 6, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Convolutional neural network optimization mechanism
- Patent number 12,020,135
- Issue date Jun 25, 2024
- Intel Corporation
- Liwei Ma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile architecture for graphics operations
- Patent number 12,013,808
- Issue date Jun 18, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management for detecting cross tile access provid...
- Patent number 11,995,029
- Issue date May 28, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimizations for low precision machine learning operations
- Patent number 11,948,224
- Issue date Apr 2, 2024
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Convolutional neural network optimization mechanism
- Patent number 11,934,934
- Issue date Mar 19, 2024
- Intel Corporation
- Liwei Ma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 11,922,535
- Issue date Mar 5, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction based control of memory attributes
- Patent number 11,899,614
- Issue date Feb 13, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data prefetching for graphics data processing
- Patent number 11,892,950
- Issue date Feb 6, 2024
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Autonomous vehicle advanced sensing and response
- Patent number 11,810,405
- Issue date Nov 7, 2023
- Intel Corporation
- Barath Lakshamanan
- B60 - VEHICLES IN GENERAL
Information Patent Grant
Dynamic assignment of down sampling intervals for data stream proce...
- Patent number 11,798,198
- Issue date Oct 24, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 11,762,804
- Issue date Sep 19, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Convolutional neural network optimization mechanism
- Patent number 11,727,246
- Issue date Aug 15, 2023
- Intel Corporation
- Liwei Ma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread group scheduling for graphics processing
- Patent number 11,709,714
- Issue date Jul 25, 2023
- Intel Corporation
- Ben Ashbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 11,620,256
- Issue date Apr 4, 2023
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extend GPU/CPU coherency to multi-GPU cores
- Patent number 11,609,856
- Issue date Mar 21, 2023
- Intel Corporation
- Chandrasekaran Sakthivel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 11,593,910
- Issue date Feb 28, 2023
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 11,562,461
- Issue date Jan 24, 2023
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods in a graphics environment for providing shared...
- Patent number 11,556,480
- Issue date Jan 17, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-TILE GRAPHICS PROCESSING UNIT
- Publication number 20250200700
- Publication date Jun 19, 2025
- Intel Corporation
- Michal Mrozek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20250166115
- Publication date May 22, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BARRIER STATE SAVE AND RESTORE FOR PREEMPTION IN A GRAPHICS ENVIRON...
- Publication number 20250130848
- Publication date Apr 24, 2025
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATIONS FOR LOW PRECISION MACHINE LEARNING OPERATIONS
- Publication number 20250117874
- Publication date Apr 10, 2025
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20250103548
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20250068588
- Publication date Feb 27, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20250028675
- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20240257294
- Publication date Aug 1, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PREFETCHING FOR GRAPHICS DATA PROCESSING
- Publication number 20240256456
- Publication date Aug 1, 2024
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONVOLUTIONAL NEURAL NETWORK OPTIMIZATION MECHANISM
- Publication number 20240256825
- Publication date Aug 1, 2024
- Intel Corporation
- Liwei Ma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAMED AND CLUSTER BARRIERS
- Publication number 20240231957
- Publication date Jul 11, 2024
- Intel Corporation
- Fangwen Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZATION FOR DATA MULTICAST IN COMPUTE CORE CLUSTERS
- Publication number 20240220335
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE AND CONFIGURABLE CLUSTERED SYSTOLIC ARRAY
- Publication number 20240220448
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA MULTICAST IN COMPUTE CORE CLUSTERS
- Publication number 20240220254
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREASING PROCESSING RESOURCES IN PROCESSING CORES OF A GRAPHICS E...
- Publication number 20240160478
- Publication date May 16, 2024
- Intel Corporation
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAMED AND CLUSTER BARRIERS
- Publication number 20240134719
- Publication date Apr 25, 2024
- Intel Corporation
- Fangwen Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ORDERED THREAD DISPATCH FOR THREAD TEAMS
- Publication number 20240111590
- Publication date Apr 4, 2024
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES
- Publication number 20240086356
- Publication date Mar 14, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION OF MACHINE LEARNING MODELS UTILIZING PSEUDO-LABELED DAT...
- Publication number 20240070926
- Publication date Feb 29, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCURRENT COMPUTE CONTEXT
- Publication number 20240054595
- Publication date Feb 15, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20240045830
- Publication date Feb 8, 2024
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD GROUP SCHEDULING FOR GRAPHICS PROCESSING
- Publication number 20240028404
- Publication date Jan 25, 2024
- Intel Corporation
- Ben Ashbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATIONS FOR LOW PRECISION MACHINE LEARNING OPERATIONS
- Publication number 20230401668
- Publication date Dec 14, 2023
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE PROCESSOR WITH EACH CORE HAVING INDEPENDENT FLOATING POIN...
- Publication number 20230315481
- Publication date Oct 5, 2023
- Intel Corporation
- ELMOUSTAPHA OULD-AHMED-VALL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20230260072
- Publication date Aug 17, 2023
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC ASSIGNMENT OF DOWN SAMPLING INTERVALS FOR DATA STREAM PROCE...
- Publication number 20230230289
- Publication date Jul 20, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER INFERENCE ENGINE PIPELINE IN A GRAPHICS PROCESSING UNIT
- Publication number 20230195519
- Publication date Jun 22, 2023
- Intel Corporation
- Vidhya Krishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR MEMORY ACCESS ARCHITECTURE WITH ADDRESS SORTING
- Publication number 20230104845
- Publication date Apr 6, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING

Ben J. Ashbaugh

Person

Patents Grantslast 30 patents

Multi-tile graphics processing unit

Implicit fence for write messages

Providing native support for generic pointers in a graphics process...

Multi-tile graphics processing unit

Systems and methods for improving cache efficiency and utilization

Compute optimization mechanism for deep neural networks

Concurrent multi-datatype execution within a processing resource

Barrier state save and restore for preemption in a graphics environ...

Compute optimizations for low precision machine learning operations

Scalar core integration

Graphics processor operation scheduling for deterministic latency

Compression of machine learning models utilizing pseudo-labeled dat...

Convolutional neural network optimization mechanism

Multi-tile architecture for graphics operations

Multi-tile memory management for detecting cross tile access provid...

Compute optimizations for low precision machine learning operations

Convolutional neural network optimization mechanism

Compute optimization mechanism for deep neural networks

Instruction based control of memory attributes

Data prefetching for graphics data processing

Autonomous vehicle advanced sensing and response

Dynamic assignment of down sampling intervals for data stream proce...

Scalar core integration

Convolutional neural network optimization mechanism

Thread group scheduling for graphics processing

Systems and methods for improving cache efficiency and utilization

Extend GPU/CPU coherency to multi-GPU cores

Compute optimization mechanism for deep neural networks

Compute optimization mechanism for deep neural networks

Systems and methods in a graphics environment for providing shared...

Patents Applicationslast 30 patents

MULTI-TILE GRAPHICS PROCESSING UNIT

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

BARRIER STATE SAVE AND RESTORE FOR PREEMPTION IN A GRAPHICS ENVIRON...

COMPUTE OPTIMIZATIONS FOR LOW PRECISION MACHINE LEARNING OPERATIONS

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

SCALAR CORE INTEGRATION

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

CONVOLUTIONAL NEURAL NETWORK OPTIMIZATION MECHANISM

NAMED AND CLUSTER BARRIERS

SYNCHRONIZATION FOR DATA MULTICAST IN COMPUTE CORE CLUSTERS

SCALABLE AND CONFIGURABLE CLUSTERED SYSTOLIC ARRAY

DATA MULTICAST IN COMPUTE CORE CLUSTERS

INCREASING PROCESSING RESOURCES IN PROCESSING CORES OF A GRAPHICS E...

NAMED AND CLUSTER BARRIERS

ORDERED THREAD DISPATCH FOR THREAD TEAMS

INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES

COMPRESSION OF MACHINE LEARNING MODELS UTILIZING PSEUDO-LABELED DAT...

CONCURRENT COMPUTE CONTEXT

SCALAR CORE INTEGRATION

THREAD GROUP SCHEDULING FOR GRAPHICS PROCESSING

COMPUTE OPTIMIZATIONS FOR LOW PRECISION MACHINE LEARNING OPERATIONS

MULTICORE PROCESSOR WITH EACH CORE HAVING INDEPENDENT FLOATING POIN...

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

DYNAMIC ASSIGNMENT OF DOWN SAMPLING INTERVALS FOR DATA STREAM PROCE...

LOW POWER INFERENCE ENGINE PIPELINE IN A GRAPHICS PROCESSING UNIT

GRAPHICS PROCESSOR MEMORY ACCESS ARCHITECTURE WITH ADDRESS SORTING