Benjamin J. Ehlers

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Austin, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit power management verification method
- Patent number 8,645,886
- Issue date Feb 4, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective bit error detection at a bus device
- Patent number 7,631,229
- Issue date Dec 8, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Benjamin J. Ehlers
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT POWER MANAGEMENT VERIFICATION METHOD
- Publication number 20130275936
- Publication date Oct 17, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Kumar Abhishek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selective bit error detection at a bus device
- Publication number 20070250741
- Publication date Oct 25, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Benjamin J. Ehlers
- G06 - COMPUTING CALCULATING COUNTING