Bernard C. Drerup

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Using idle caches as a backing store for boot code
- Patent number 11,635,968
- Issue date Apr 25, 2023
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative delivery of data from a lower level of a memory hierarc...
- Patent number 11,615,024
- Issue date Mar 28, 2023
- International Business Machines Corporation
- Derek E. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling issue rates of requests of varying broadcast scopes in...
- Patent number 11,573,902
- Issue date Feb 7, 2023
- International Business Machines Corporation
- Hugh Shen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Targeting of lateral castouts in a data processing system
- Patent number 11,561,900
- Issue date Jan 24, 2023
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distribution of injected data among caches of a data processing system
- Patent number 11,561,901
- Issue date Jan 24, 2023
- International Business Machines Corporation
- Derek E. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system having masters that adapt to agents with dif...
- Patent number 11,556,472
- Issue date Jan 17, 2023
- International Business Machines Corporation
- Derek E. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split transaction coherency protocol in a data processing system
- Patent number 11,449,489
- Issue date Sep 20, 2022
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache data replacement in a networked computing system using refere...
- Patent number 10,776,275
- Issue date Sep 15, 2020
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache line replacement using reference states based on data referen...
- Patent number 10,671,539
- Issue date Jun 2, 2020
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache line selection
- Patent number 10,649,901
- Issue date May 12, 2020
- International Business Machines Corporation
- Bernard Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetch performance
- Patent number 10,191,845
- Issue date Jan 29, 2019
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetch performance
- Patent number 10,191,847
- Issue date Jan 29, 2019
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Counter-based victim selection in a cache memory
- Patent number 9,940,239
- Issue date Apr 10, 2018
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Counter-based victim selection in a cache memory
- Patent number 9,940,246
- Issue date Apr 10, 2018
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-serialized push instruction for pushing a message payload from...
- Patent number 9,778,933
- Issue date Oct 3, 2017
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-serialized push instruction for pushing a message payload from...
- Patent number 9,766,890
- Issue date Sep 19, 2017
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid replacement policy in a multilevel cache memory hierarchy
- Patent number 9,753,862
- Issue date Sep 5, 2017
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Counter-based victim selection in a cache memory
- Patent number 9,727,488
- Issue date Aug 8, 2017
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Counter-based victim selection in a cache memory
- Patent number 9,727,489
- Issue date Aug 8, 2017
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Injection of at least a partial cache line in a private multilevel...
- Patent number 9,665,297
- Issue date May 30, 2017
- International Business Machines Corporation
- Luis E. De La Torre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Push instruction for pushing a message payload from a sending threa...
- Patent number 9,575,825
- Issue date Feb 21, 2017
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Push instruction for pushing a message payload from a sending threa...
- Patent number 9,569,293
- Issue date Feb 14, 2017
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-assisted interthread push communication
- Patent number 9,342,387
- Issue date May 17, 2016
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-assisted interthread push communication
- Patent number 9,286,148
- Issue date Mar 15, 2016
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collective acceleration unit tree structure
- Patent number 8,756,270
- Issue date Jun 17, 2014
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Collective acceleration unit tree structure
- Patent number 8,751,655
- Issue date Jun 10, 2014
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Collective acceleration unit tree flow control and retransmit
- Patent number 8,417,778
- Issue date Apr 9, 2013
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronization optimized queuing system
- Patent number 8,302,109
- Issue date Oct 30, 2012
- International Business Machines Corporation
- Lakshminarayana Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor system and methods of triggering a block move using a sys...
- Patent number 8,281,075
- Issue date Oct 2, 2012
- International Business Machines Corporation
- Lakshminarayana Baba Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure for maintaining memory data integrity in a processor inte...
- Patent number 8,266,386
- Issue date Sep 11, 2012
- International Business Machines Corporation
- Bernard Charles Drerup
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
USING IDLE CACHES AS A BACKING STORE FOR BOOT CODE
- Publication number 20230078861
- Publication date Mar 16, 2023
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING ISSUE RATES OF REQUESTS OF VARYING BROADCAST SCOPES IN...
- Publication number 20230063992
- Publication date Mar 2, 2023
- International Business Machines Corporation
- HUGH SHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTION OF INJECTED DATA AMONG CACHES OF A DATA PROCESSING SYSTEM
- Publication number 20230041702
- Publication date Feb 9, 2023
- International Business Machines Corporation
- DEREK E. WILLIAMS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE DELIVERY OF DATA FROM A LOWER LEVEL OF A MEMORY HIERARC...
- Publication number 20230042778
- Publication date Feb 9, 2023
- International Business Machines Corporation
- DEREK E. WILLIAMS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING SYSTEM HAVING MASTERS THAT ADAPT TO AGENTS WITH DIF...
- Publication number 20230040617
- Publication date Feb 9, 2023
- International Business Machines Corporation
- DEREK E. WILLIAMS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TARGETING OF LATERAL CASTOUTS IN A DATA PROCESSING SYSTEM
- Publication number 20230044350
- Publication date Feb 9, 2023
- International Business Machines Corporation
- BERNARD C. DRERUP
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE LINE REPLACEMENT USING REFERENCE STATES BASED ON DATA REFEREN...
- Publication number 20200117607
- Publication date Apr 16, 2020
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATE AND PROBABILTY BASED CACHE LINE REPLACEMENT
- Publication number 20200117608
- Publication date Apr 16, 2020
- International Business Machines Corporation
- Brian W. Thompto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR IMPLEMENTING A SPLIT TRANSACTION COHERENCY PROTOCOL...
- Publication number 20190138630
- Publication date May 9, 2019
- International Business Machines Corporation
- BERNARD C. DRERUP
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE LINE SELECTION
- Publication number 20190042439
- Publication date Feb 7, 2019
- International Business Machines Corporation
- BERNARD DRERUP
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCH PERFORMANCE
- Publication number 20180341591
- Publication date Nov 29, 2018
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCH PERFORMANCE
- Publication number 20180341592
- Publication date Nov 29, 2018
- International Business Machines Corporation
- Bernard C. Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COUNTER-BASED VICTIM SELECTION IN A CACHE MEMORY
- Publication number 20180101478
- Publication date Apr 12, 2018
- International Business Machines Corporation
- BERNARD C. DRERUP
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COUNTER-BASED VICTIM SELECTION IN A CACHE MEMORY
- Publication number 20180101476
- Publication date Apr 12, 2018
- International Business Machines Corporation
- BERNARD C. DRERUP
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-SERIALIZED PUSH INSTRUCTION FOR PUSHING A MESSAGE PAYLOAD FROM...
- Publication number 20160179517
- Publication date Jun 23, 2016
- International Business Machines Corporation
- LAKSHMINARAYANA B. ARIMILLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PUSH INSTRUCTION FOR PUSHING A MESSAGE PAYLOAD FROM A SENDING THREA...
- Publication number 20160179591
- Publication date Jun 23, 2016
- International Business Machines Corporation
- LAKSHMINARAYANA B. ARIMILLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PUSH INSTRUCTION FOR PUSHING A MESSAGE PAYLOAD FROM A SENDING THREA...
- Publication number 20160179593
- Publication date Jun 23, 2016
- International Business Machines Corporation
- LAKSHMINARAYANA B. ARIMILLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-SERIALIZED PUSH INSTRUCTION FOR PUSHING A MESSAGE PAYLOAD FROM...
- Publication number 20160179518
- Publication date Jun 23, 2016
- International Business Machines Corporation
- LAKSHMINARAYANA B. ARIMILLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Collective Acceleration Unit Tree Structure
- Publication number 20120296915
- Publication date Nov 22, 2012
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Collective Acceleration Unit Tree Structure
- Publication number 20110238956
- Publication date Sep 29, 2011
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Collective Acceleration Unit Tree Flow Control and Retransmit
- Publication number 20110173258
- Publication date Jul 14, 2011
- International Business Machines Corporation
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE INDICATOR SIGNAL GENERATION SYSTEM AND METHOD
- Publication number 20110107000
- Publication date May 5, 2011
- International Business Machines Corporation
- Parag Birmiwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE INDICATOR SIGNAL GENERATION SYSTEM AND METHOD
- Publication number 20110074386
- Publication date Mar 31, 2011
- International Business Machines Corporation
- Parag Birmiwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR TRIGGERING A BLOCK MOVE USING A SYSTEM BUS WRITE COM...
- Publication number 20100262735
- Publication date Oct 14, 2010
- International Buisness Machines Corporation
- Lakshminarayana Baba Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PATH MASTER/SLAVE DATA PROCESSING DEVICE
- Publication number 20100169527
- Publication date Jul 1, 2010
- International Business Machines Corporation
- Bernard Charles Drerup
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Performing Dynamic Request Routing Based on B...
- Publication number 20090198957
- Publication date Aug 6, 2009
- Lakshminarayana B. Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Performing Dynamic Request Routing Based on B...
- Publication number 20090198958
- Publication date Aug 6, 2009
- Lakshminarayana B. Arimilli
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Cache Intervention on a Separate Data Bus When On-Chip Bus Has Sepa...
- Publication number 20090177821
- Publication date Jul 9, 2009
- Robert Michael Dinkjian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Utilizing Programmable Channels for Allocation of Buffer Space and...
- Publication number 20090138629
- Publication date May 28, 2009
- International Business Machines Corporation
- Sundeep Chadha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Path Master/Slave Data Processing Device Apparatus
- Publication number 20090132743
- Publication date May 21, 2009
- Bernard Charles Drerup
- G06 - COMPUTING CALCULATING COUNTING

Bernard C. Drerup

Person

Patents Grantslast 30 patents

Using idle caches as a backing store for boot code

Speculative delivery of data from a lower level of a memory hierarc...

Controlling issue rates of requests of varying broadcast scopes in...

Targeting of lateral castouts in a data processing system

Distribution of injected data among caches of a data processing system

Data processing system having masters that adapt to agents with dif...

Split transaction coherency protocol in a data processing system

Cache data replacement in a networked computing system using refere...

Cache line replacement using reference states based on data referen...

Victim cache line selection

Prefetch performance

Prefetch performance

Counter-based victim selection in a cache memory

Counter-based victim selection in a cache memory

Non-serialized push instruction for pushing a message payload from...

Non-serialized push instruction for pushing a message payload from...

Hybrid replacement policy in a multilevel cache memory hierarchy

Counter-based victim selection in a cache memory

Counter-based victim selection in a cache memory

Injection of at least a partial cache line in a private multilevel...

Push instruction for pushing a message payload from a sending threa...

Push instruction for pushing a message payload from a sending threa...

Hardware-assisted interthread push communication

Hardware-assisted interthread push communication

Collective acceleration unit tree structure

Collective acceleration unit tree structure

Collective acceleration unit tree flow control and retransmit

Synchronization optimized queuing system

Processor system and methods of triggering a block move using a sys...

Structure for maintaining memory data integrity in a processor inte...

Patents Applicationslast 30 patents

USING IDLE CACHES AS A BACKING STORE FOR BOOT CODE

CONTROLLING ISSUE RATES OF REQUESTS OF VARYING BROADCAST SCOPES IN...

DISTRIBUTION OF INJECTED DATA AMONG CACHES OF A DATA PROCESSING SYSTEM

SPECULATIVE DELIVERY OF DATA FROM A LOWER LEVEL OF A MEMORY HIERARC...

DATA PROCESSING SYSTEM HAVING MASTERS THAT ADAPT TO AGENTS WITH DIF...

TARGETING OF LATERAL CASTOUTS IN A DATA PROCESSING SYSTEM

CACHE LINE REPLACEMENT USING REFERENCE STATES BASED ON DATA REFEREN...

STATE AND PROBABILTY BASED CACHE LINE REPLACEMENT

TECHNIQUES FOR IMPLEMENTING A SPLIT TRANSACTION COHERENCY PROTOCOL...

VICTIM CACHE LINE SELECTION

PREFETCH PERFORMANCE

PREFETCH PERFORMANCE

COUNTER-BASED VICTIM SELECTION IN A CACHE MEMORY

COUNTER-BASED VICTIM SELECTION IN A CACHE MEMORY

NON-SERIALIZED PUSH INSTRUCTION FOR PUSHING A MESSAGE PAYLOAD FROM...

PUSH INSTRUCTION FOR PUSHING A MESSAGE PAYLOAD FROM A SENDING THREA...

PUSH INSTRUCTION FOR PUSHING A MESSAGE PAYLOAD FROM A SENDING THREA...

NON-SERIALIZED PUSH INSTRUCTION FOR PUSHING A MESSAGE PAYLOAD FROM...

Collective Acceleration Unit Tree Structure

Collective Acceleration Unit Tree Structure

Collective Acceleration Unit Tree Flow Control and Retransmit

VOLTAGE INDICATOR SIGNAL GENERATION SYSTEM AND METHOD

VOLTAGE INDICATOR SIGNAL GENERATION SYSTEM AND METHOD

TECHNIQUES FOR TRIGGERING A BLOCK MOVE USING A SYSTEM BUS WRITE COM...

DATA PATH MASTER/SLAVE DATA PROCESSING DEVICE

System and Method for Performing Dynamic Request Routing Based on B...

System and Method for Performing Dynamic Request Routing Based on B...

Cache Intervention on a Separate Data Bus When On-Chip Bus Has Sepa...

Utilizing Programmable Channels for Allocation of Buffer Space and...

Data Path Master/Slave Data Processing Device Apparatus