Bernard L. Morris

Person

Allentown, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Voltage level translator circuit
- Patent number 8,536,925
- Issue date Sep 17, 2013
- Agere Systems LLC
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electrostatic discharge protection circuit
- Patent number 8,089,739
- Issue date Jan 3, 2012
- Agere Systems Inc.
- Dipankar Bhattacharya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple-mode compensated buffer circuit
- Patent number 7,642,807
- Issue date Jan 5, 2010
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit with signal skew adjusting cell selected from ce...
- Patent number 7,590,961
- Issue date Sep 15, 2009
- Agere Systems Inc.
- Martin J. Gasper, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced output impedance compensation
- Patent number 7,551,020
- Issue date Jun 23, 2009
- Agere Systems Inc.
- Dipankar Bhattacharya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit for selectively bypassing a capacitive element
- Patent number 7,529,071
- Issue date May 5, 2009
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for improving reliability of an integrated cir...
- Patent number 7,511,550
- Issue date Mar 31, 2009
- Agere Systems Inc.
- Dipankar Bhattacharya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buffer circuit having multiplexed voltage level translation
- Patent number 7,498,860
- Issue date Mar 3, 2009
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electrostatic discharge protection in a semiconductor device
- Patent number 7,495,873
- Issue date Feb 24, 2009
- Agere Systems Inc.
- Dipankar Bhattacharya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit having enhanced input signal range
- Patent number 7,432,762
- Issue date Oct 7, 2008
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Buffer circuit with enhanced overvoltage protection
- Patent number 7,430,100
- Issue date Sep 30, 2008
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage level translator circuit with wide supply voltage range
- Patent number 7,397,279
- Issue date Jul 8, 2008
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Comparator circuit having reduced pulse width distortion
- Patent number 7,391,825
- Issue date Jun 24, 2008
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Buffer circuit with multiple voltage range
- Patent number 7,382,168
- Issue date Jun 3, 2008
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Floating well circuit having enhanced latch-up performance
- Patent number 7,276,957
- Issue date Oct 2, 2007
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Buffer circuit with current limiting
- Patent number 7,271,614
- Issue date Sep 18, 2007
- Agere Systems Inc.
- Samuel Khoo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Differential buffer circuit with reduced output common mode variation
- Patent number 7,248,079
- Issue date Jul 24, 2007
- Agere Systems Inc.
- Dipankar Bhattacharya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reference compensation circuit
- Patent number 7,218,169
- Issue date May 15, 2007
- Agere Syatems Inc.
- Dipankar Bhattacharya
- G05 - CONTROLLING REGULATING
Information Patent Grant
Output buffer with selectable slew rate
- Patent number 7,170,324
- Issue date Jan 30, 2007
- Agere Systems Inc.
- Carol Ann Huber
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-bypassing voltage level translator circuit
- Patent number 7,145,364
- Issue date Dec 5, 2006
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit with controllable test access to internal analog...
- Patent number 7,138,814
- Issue date Nov 21, 2006
- Agere Systems Inc.
- Thaddeus John Gabara
- G01 - MEASURING TESTING
Information Patent Grant
Reliability comparator with hysteresis
- Patent number 7,106,107
- Issue date Sep 12, 2006
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Overvoltage tolerant input buffer
- Patent number 7,098,694
- Issue date Aug 29, 2006
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage level translator circuit
- Patent number 7,068,074
- Issue date Jun 27, 2006
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor resistance compensation with enhanced efficiency
- Patent number 7,057,545
- Issue date Jun 6, 2006
- Agere Systems Inc.
- Dipankar Bhattacharya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Moderate current 5V tolerant buffer using a 2.5 volt power supply
- Patent number 7,002,372
- Issue date Feb 21, 2006
- Agere Systems Inc.
- Carol Ann Huber
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High current 5V tolerant buffer using a 2.5 volt power supply
- Patent number 6,977,524
- Issue date Dec 20, 2005
- Agere Systems Inc.
- Carol Ann Huber
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bi-directional impedance matching circuit
- Patent number 6,850,091
- Issue date Feb 1, 2005
- Agere Systems, INC
- Bernard Lee Morris
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Voltage translator circuit for a mixed voltage circuit
- Patent number 6,774,698
- Issue date Aug 10, 2004
- Agere Systems Inc.
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic low power reference circuit
- Patent number 6,686,789
- Issue date Feb 3, 2004
- Agere Systems, INC
- Douglas D. Lopata
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
Electrostatic Discharge Protection Circuit
- Publication number 20100232078
- Publication date Sep 16, 2010
- Dipankar Bhattacharya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple-Mode Compensated Buffer Circuit
- Publication number 20090002017
- Publication date Jan 1, 2009
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Enhanced Output Impedance Compensation
- Publication number 20080297226
- Publication date Dec 4, 2008
- Dipankar Bhattacharya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Buffer Circuit Having Multiplexed Voltage Level Translation
- Publication number 20080238399
- Publication date Oct 2, 2008
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Circuit for Selectively Bypassing a Capacitive Element
- Publication number 20080074814
- Publication date Mar 27, 2008
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Improving Reliability of an Integrated Cir...
- Publication number 20080074171
- Publication date Mar 27, 2008
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Integrated Circuit with Signal Skew Adjusting Cell Selected from Ce...
- Publication number 20070256047
- Publication date Nov 1, 2007
- Martin J. Gasper, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit having enhanced input signal range
- Publication number 20070229157
- Publication date Oct 4, 2007
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Voltage level translator circuit with wide supply voltage range
- Publication number 20070176635
- Publication date Aug 2, 2007
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Differential buffer circuit with reduced output common mode variation
- Publication number 20070115030
- Publication date May 24, 2007
- Dipankar Bhattacharya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Floating well circuit having enhanced latch-up performance
- Publication number 20070075748
- Publication date Apr 5, 2007
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Buffer circuit with multiple voltage range
- Publication number 20070046338
- Publication date Mar 1, 2007
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Buffer circuit with enhanced overvoltage protection
- Publication number 20070019348
- Publication date Jan 25, 2007
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Buffer circuit with current limiting
- Publication number 20060220684
- Publication date Oct 5, 2006
- Samuel Khoo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Self-bypassing voltage level translator circuit
- Publication number 20060192587
- Publication date Aug 31, 2006
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Comparator circuit having reduced pulse width distortion
- Publication number 20060170461
- Publication date Aug 3, 2006
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RELIABILITY COMPARATOR WITH HYSTERESIS
- Publication number 20060170462
- Publication date Aug 3, 2006
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Bias circuit having reduced power-up delay
- Publication number 20060145749
- Publication date Jul 6, 2006
- Dipankar Bhattacharya
- G05 - CONTROLLING REGULATING
Information Patent Application
Overvoltage tolerant input buffer
- Publication number 20060103427
- Publication date May 18, 2006
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Electrostatic discharge protection in a semiconductor device
- Publication number 20060092589
- Publication date May 4, 2006
- Dipankar Bhattacharya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Voltage level translator circuit with feedback
- Publication number 20060066381
- Publication date Mar 30, 2006
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Integrated circuit with signal skew adjusting cell selected from ce...
- Publication number 20060044016
- Publication date Mar 2, 2006
- Martin J. Gasper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Output buffer with selectable slew rate
- Publication number 20060012406
- Publication date Jan 19, 2006
- Carol Ann Huber
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Voltage level translator circuit
- Publication number 20060001449
- Publication date Jan 5, 2006
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Coms buffer having higher and lower voltage operation
- Publication number 20050270065
- Publication date Dec 8, 2005
- Dipankar Bhattacharya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Moderate current 5V tolerant buffer using a 2.5 volt power supply
- Publication number 20050156628
- Publication date Jul 21, 2005
- Carol Ann Huber
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH CURRENT 5V TOLERANT BUFFER USING A 2.5 VOLT POWER SUPPLY
- Publication number 20050156629
- Publication date Jul 21, 2005
- Carol Ann Huber
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Reference compensation circuit
- Publication number 20050134364
- Publication date Jun 23, 2005
- Dipankar Bhattacharya
- G05 - CONTROLLING REGULATING
Information Patent Application
Integrated circuit with controllable test access to internal analog...
- Publication number 20050110511
- Publication date May 26, 2005
- Thaddeus John Gabara
- G01 - MEASURING TESTING
Information Patent Application
Bi-directional impedance matching circuit
- Publication number 20040201401
- Publication date Oct 14, 2004
- Agere Systems, Inc.
- Bernard Lee Morris
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Bernard L. Morris

Person

Patents Grantslast 30 patents

Voltage level translator circuit

Electrostatic discharge protection circuit

Multiple-mode compensated buffer circuit

Integrated circuit with signal skew adjusting cell selected from ce...

Enhanced output impedance compensation

Circuit for selectively bypassing a capacitive element

Method and apparatus for improving reliability of an integrated cir...

Buffer circuit having multiplexed voltage level translation

Electrostatic discharge protection in a semiconductor device

Circuit having enhanced input signal range

Buffer circuit with enhanced overvoltage protection

Voltage level translator circuit with wide supply voltage range

Comparator circuit having reduced pulse width distortion

Buffer circuit with multiple voltage range

Floating well circuit having enhanced latch-up performance

Buffer circuit with current limiting

Differential buffer circuit with reduced output common mode variation

Reference compensation circuit

Output buffer with selectable slew rate

Self-bypassing voltage level translator circuit

Integrated circuit with controllable test access to internal analog...

Reliability comparator with hysteresis

Overvoltage tolerant input buffer

Voltage level translator circuit

Semiconductor resistance compensation with enhanced efficiency

Moderate current 5V tolerant buffer using a 2.5 volt power supply

High current 5V tolerant buffer using a 2.5 volt power supply

Bi-directional impedance matching circuit

Voltage translator circuit for a mixed voltage circuit

Dynamic low power reference circuit

Patents Applicationslast 30 patents

Electrostatic Discharge Protection Circuit

Multiple-Mode Compensated Buffer Circuit

Enhanced Output Impedance Compensation

Buffer Circuit Having Multiplexed Voltage Level Translation

Circuit for Selectively Bypassing a Capacitive Element

Method and Apparatus for Improving Reliability of an Integrated Cir...

Integrated Circuit with Signal Skew Adjusting Cell Selected from Ce...

Circuit having enhanced input signal range

Voltage level translator circuit with wide supply voltage range

Differential buffer circuit with reduced output common mode variation

Floating well circuit having enhanced latch-up performance

Buffer circuit with multiple voltage range

Buffer circuit with enhanced overvoltage protection

Buffer circuit with current limiting

Self-bypassing voltage level translator circuit

Comparator circuit having reduced pulse width distortion

RELIABILITY COMPARATOR WITH HYSTERESIS

Bias circuit having reduced power-up delay

Overvoltage tolerant input buffer

Electrostatic discharge protection in a semiconductor device

Voltage level translator circuit with feedback

Integrated circuit with signal skew adjusting cell selected from ce...

Output buffer with selectable slew rate

Voltage level translator circuit

Coms buffer having higher and lower voltage operation

Moderate current 5V tolerant buffer using a 2.5 volt power supply

HIGH CURRENT 5V TOLERANT BUFFER USING A 2.5 VOLT POWER SUPPLY

Reference compensation circuit

Integrated circuit with controllable test access to internal analog...

Bi-directional impedance matching circuit