Bernard Pappert

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Seebeck effect renewable energy arrangement
- Patent number 12,108,675
- Issue date Oct 1, 2024
- Bernard Pappert
Information Patent Grant
Active tiling placement for improved latch-up immunity
- Patent number 8,765,607
- Issue date Jul 1, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Robert S. Ruth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having buffering circuitry with slew rate control
- Patent number 6,492,686
- Issue date Dec 10, 2002
- Motorola, Inc.
- Bernard J. Pappert
- G05 - CONTROLLING REGULATING
Information Patent Grant
Integrated circuit for handling buffer contention and method thereof
- Patent number 6,380,760
- Issue date Apr 30, 2002
- Motorola, Inc.
- Bernard J. Pappert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for leveraging history bits to optimize memory...
- Patent number 6,167,484
- Issue date Dec 26, 2000
- Motorola, Inc.
- John Mark Boyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit for handling buffer contention and method thereof
- Patent number 6,147,510
- Issue date Nov 14, 2000
- Motorola Inc.
- Bernard J. Pappert
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit having buffering circuitry with slew rate control
- Patent number 6,066,971
- Issue date May 23, 2000
- Motorola, Inc.
- Bernard J. Pappert
- G05 - CONTROLLING REGULATING
Information Patent Grant
Fuseless memory repair system and method of operation
- Patent number 6,011,734
- Issue date Jan 4, 2000
- Motorola, Inc.
- Bernard J. Pappert
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for performing operative testing on an integra...
- Patent number 5,929,650
- Issue date Jul 27, 1999
- Motorola, Inc.
- Bernard J. Pappert
- G01 - MEASURING TESTING
Information Patent Grant
Quiescent current monitor circuit for wafer level integrated circui...
- Patent number 5,912,562
- Issue date Jun 15, 1999
- Motorola Inc.
- Bernard J. Pappert
- G01 - MEASURING TESTING
Information Patent Grant
Method for creating a high speed scan-interconnected set of flip-fl...
- Patent number 5,717,700
- Issue date Feb 10, 1998
- Motorola, Inc.
- Alfred L. Crouch
- G01 - MEASURING TESTING
Information Patent Grant
Barrel shifter
- Patent number 4,827,441
- Issue date May 2, 1989
- Motorola, Inc.
- Ashok Someshwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two state synchronizer
- Patent number 4,663,546
- Issue date May 5, 1987
- Motorola, Inc.
- John K. Eitrheim
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Active Tiling Placement for Improved Latch-up Immunity
- Publication number 20140264728
- Publication date Sep 18, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Robert S. Ruth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Active Tiling Placement for Improved Latch-Up Immunity
- Publication number 20120306045
- Publication date Dec 6, 2012
- Robert S. Ruth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Level shifter with reduced duty cycle variation
- Publication number 20050285658
- Publication date Dec 29, 2005
- Kyle C. Schulmeyer
- H03 - BASIC ELECTRONIC CIRCUITRY

Bernard Pappert

Person

Patents Grantslast 30 patents

Seebeck effect renewable energy arrangement

Active tiling placement for improved latch-up immunity

Integrated circuit having buffering circuitry with slew rate control

Integrated circuit for handling buffer contention and method thereof

Method and apparatus for leveraging history bits to optimize memory...

Integrated circuit for handling buffer contention and method thereof

Integrated circuit having buffering circuitry with slew rate control

Fuseless memory repair system and method of operation

Method and apparatus for performing operative testing on an integra...

Quiescent current monitor circuit for wafer level integrated circui...

Method for creating a high speed scan-interconnected set of flip-fl...

Barrel shifter

Two state synchronizer

Patents Applicationslast 30 patents

Active Tiling Placement for Improved Latch-up Immunity

Active Tiling Placement for Improved Latch-Up Immunity

Level shifter with reduced duty cycle variation