Bernard PREVITALI

Person

Grenoble, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Architecture with stacked N and P transistors with a channel struct...
- Patent number 12,237,330
- Issue date Feb 25, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Architecture of N and P transistors superposed with canal structure...
- Patent number 11,152,360
- Issue date Oct 19, 2021
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating an improved field effect device
- Patent number 10,128,332
- Issue date Nov 13, 2018
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bernard Previtali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing of self aligned interconnection elements for 3D integ...
- Patent number 9,761,583
- Issue date Sep 12, 2017
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Claire Fenouillet-Beranger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a three dimensional integrated electronic circuit
- Patent number 9,721,850
- Issue date Aug 1, 2017
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bernard Previtali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method of an improved field effect device
- Patent number 9,461,142
- Issue date Oct 4, 2016
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bernard Previtali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing method for a device with transistors strained by sili...
- Patent number 9,093,552
- Issue date Jul 28, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Fabrice Nemouchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing a three-dimensional integrated circuit
- Patent number 8,796,118
- Issue date Aug 5, 2014
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bernard Previtali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing a device with transistors strained by means of...
- Patent number 8,664,104
- Issue date Mar 4, 2014
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Fabrice Nemouchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a transistor with metallic source and drain
- Patent number 8,021,986
- Issue date Sep 20, 2011
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Bernard Previtali
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method for making a transistor with metallic source and drain
- Patent number 8,021,934
- Issue date Sep 20, 2011
- Commissariat a l'Energie Atomique
- Maud Vinet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a field effect transistor with auto-aligne...
- Patent number 7,977,195
- Issue date Jul 12, 2011
- Commissariat a l'Energie Atomique
- Bernard Previtali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a field-effect transistor with self-aligned...
- Patent number 7,709,332
- Issue date May 4, 2010
- Commissariat a l'Energie Atomique
- Christophe Licitra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing process for a transistor made of thin layers
- Patent number 7,491,644
- Issue date Feb 17, 2009
- Commissariat a l'Energie Atomique
- Maud Vinet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for insulating patterns formed in a thin film of oxidizable...
- Patent number 7,473,588
- Issue date Jan 6, 2009
- Commissariat a l'Energie Atomique
- Maud Vinet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming patterns aligned on either side of a thin film
- Patent number 7,425,509
- Issue date Sep 16, 2008
- Commissariat a l'Energie Atomique
- Maud Vinet
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ARCHITECTURE WITH STACKED N AND P TRANSISTORS WITH A CHANNEL STRUCT...
- Publication number 20210391326
- Publication date Dec 16, 2021
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARCHITECTURE OF N AND P TRANSISTORS SUPERPOSED WITH CANAL STRUCTURE...
- Publication number 20200203341
- Publication date Jun 25, 2020
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING OF SELF ALIGNED INTERCONNECTION ELEMENTS FOR 3D INTEG...
- Publication number 20160365342
- Publication date Dec 15, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Claire FENOUILLET-BERANGER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING AN IMPROVED FIELD EFFECT DEVICE
- Publication number 20160315143
- Publication date Oct 27, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Bernard PREVITALI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING A THREE DIMENSIONAL INTEGRATED ELECTRONIC CIRCUIT
- Publication number 20160211184
- Publication date Jul 21, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Bernard Previtali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Unknown
- Publication number 20160190279
- Publication date Jun 30, 2016
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Bernard PREVITALI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A SUBSTRATE PROVIDED WITH EDGE PROTECTION
- Publication number 20140273480
- Publication date Sep 18, 2014
- Bernard PREVITALI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING METHOD FOR A DEVICE WITH TRANSISTORS STRAINED BY SILI...
- Publication number 20130214363
- Publication date Aug 22, 2013
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.
- Fabrice NEMOUCHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PRODUCING A DEVICE WITH TRANSISTORS STRAINED BY MEANS OF...
- Publication number 20130214362
- Publication date Aug 22, 2013
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.
- Fabrice NEMOUCHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PRODUCING A THREE-DIMENSIONAL INTEGRATED CIRCUIT
- Publication number 20130052805
- Publication date Feb 28, 2013
- COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE. ALT.
- Bernard PREVITALI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A TRANSISTOR WITH METALLIC SOURCE AND DRAIN
- Publication number 20110003443
- Publication date Jan 6, 2011
- COMMISS. A L'ENERGIE ATOM ET AUX ENERG ALTERNA
- Bernard Previtali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING A TRANSISTOR WITH METALLIC SOURCE AND DRAIN
- Publication number 20090286363
- Publication date Nov 19, 2009
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Maud VINET
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for Fabricating a Field-Effect Transistor with Self-Aligned...
- Publication number 20090011562
- Publication date Jan 8, 2009
- Christophe Licitra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A FIELD EFFECT TRANSISTOR WITH AUTO-ALIGNE...
- Publication number 20080220569
- Publication date Sep 11, 2008
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Bernard PREVITALI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Manufacturing process for a transistor made of thin layers
- Publication number 20070173064
- Publication date Jul 26, 2007
- Maud Vinet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Vertical MOS transistor and fabrication process
- Publication number 20070117324
- Publication date May 24, 2007
- Bernard Previtali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming patterns aligned on either side of a thin film
- Publication number 20060148256
- Publication date Jul 6, 2006
- Maud Vinet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for insulating patterns formed in a thin film of oxidizable...
- Publication number 20060121653
- Publication date Jun 8, 2006
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Maud Vinet
- H01 - BASIC ELECTRIC ELEMENTS

Bernard PREVITALI

Person

Patents Grantslast 30 patents

Architecture with stacked N and P transistors with a channel struct...

Architecture of N and P transistors superposed with canal structure...

Method for fabricating an improved field effect device

Manufacturing of self aligned interconnection elements for 3D integ...

Method for making a three dimensional integrated electronic circuit

Fabrication method of an improved field effect device

Manufacturing method for a device with transistors strained by sili...

Method of producing a three-dimensional integrated circuit

Method of producing a device with transistors strained by means of...

Method for producing a transistor with metallic source and drain

Method for making a transistor with metallic source and drain

Method for manufacturing a field effect transistor with auto-aligne...

Process for fabricating a field-effect transistor with self-aligned...

Manufacturing process for a transistor made of thin layers

Method for insulating patterns formed in a thin film of oxidizable...

Method for forming patterns aligned on either side of a thin film

Patents Applicationslast 30 patents

ARCHITECTURE WITH STACKED N AND P TRANSISTORS WITH A CHANNEL STRUCT...

ARCHITECTURE OF N AND P TRANSISTORS SUPERPOSED WITH CANAL STRUCTURE...

MANUFACTURING OF SELF ALIGNED INTERCONNECTION ELEMENTS FOR 3D INTEG...

METHOD FOR FABRICATING AN IMPROVED FIELD EFFECT DEVICE

METHOD FOR MAKING A THREE DIMENSIONAL INTEGRATED ELECTRONIC CIRCUIT

Unknown

METHOD FOR PRODUCING A SUBSTRATE PROVIDED WITH EDGE PROTECTION

MANUFACTURING METHOD FOR A DEVICE WITH TRANSISTORS STRAINED BY SILI...

METHOD OF PRODUCING A DEVICE WITH TRANSISTORS STRAINED BY MEANS OF...

METHOD OF PRODUCING A THREE-DIMENSIONAL INTEGRATED CIRCUIT

METHOD FOR PRODUCING A TRANSISTOR WITH METALLIC SOURCE AND DRAIN

METHOD FOR MAKING A TRANSISTOR WITH METALLIC SOURCE AND DRAIN

Process for Fabricating a Field-Effect Transistor with Self-Aligned...

METHOD FOR MANUFACTURING A FIELD EFFECT TRANSISTOR WITH AUTO-ALIGNE...

Manufacturing process for a transistor made of thin layers

Vertical MOS transistor and fabrication process

Method for forming patterns aligned on either side of a thin film

Method for insulating patterns formed in a thin film of oxidizable...