Bert R. Riemenschneider

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Sublithographic antifuse
- Patent number 5,625,220
- Issue date Apr 29, 1997
- Texas Instruments Incorporated
- David K.-Y. Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for thickening selective gate oxide regions
- Patent number 5,595,922
- Issue date Jan 21, 1997
- Texas Instruments
- Howard L. Tigelaar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall anti-fuse structure and method for making
- Patent number 5,365,105
- Issue date Nov 15, 1994
- Texas Instruments Incorporated
- David K. Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench capacitor DRAM cell and method of manufacture
- Patent number 5,225,363
- Issue date Jul 6, 1993
- Texas Instruments Incorporated
- Bert R. Riemenschneider
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile semiconductor memory
- Patent number 5,168,334
- Issue date Dec 1, 1992
- Texas Instruments, Incorporated
- Allan T. Mitchell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density EPROM fabricaiton method having sidewall floating gates
- Patent number 5,143,860
- Issue date Sep 1, 1992
- Texas Instruments Incorporated
- Allan T. Mitchell
- G11 - INFORMATION STORAGE
Information Patent Grant
Fabricating a single level merged EEPROM cell having an ONO memory...
- Patent number 5,120,672
- Issue date Jun 9, 1992
- Texas Instruments Incorporated
- Allan T. Mitchell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench capacitor DRAM cell with diffused bit lines adjacent to a tr...
- Patent number 5,105,245
- Issue date Apr 14, 1992
- Texas Instruments Incorporated
- Bert R. Riemenschneider
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory with improved coupling between gates
- Patent number 5,057,886
- Issue date Oct 15, 1991
- Texas Instruments Incorporated
- Bert R. Riemenschneider
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making high density EEPROM
- Patent number 4,980,309
- Issue date Dec 25, 1990
- Texas Instruments, Incorporated
- Allan T. Mitchell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Erasable programmable memory including buried diffusion source/drai...
- Patent number 4,924,437
- Issue date May 8, 1990
- Texas Instruments Incorporated
- James L. Paterson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EEPROM including programming electrode extending through the contro...
- Patent number 4,853,895
- Issue date Aug 1, 1989
- Texas Instruments Incorporated
- Allan T. Mitchell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
X-cell EEPROM array
- Patent number 4,839,705
- Issue date Jun 13, 1989
- Texas Instruments Incorporated
- Howard L. Tigelaar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for increasing source/drain to channel stop breakdown and de...
- Patent number 4,829,019
- Issue date May 9, 1989
- Texas Instruments Incorporated
- Allan T. Mitchell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked capacitor
- Patent number 4,827,323
- Issue date May 2, 1989
- Texas Instruments Incorporated
- Howard L. Tigelaar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitive coupling
- Patent number 4,812,885
- Issue date Mar 14, 1989
- Texas Instruments Incorporated
- Bert R. Riemenschneider
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabricating a stacked capacitor
- Patent number 4,685,197
- Issue date Aug 11, 1987
- Texas Instruments Incorporated
- Howard L. Tigelaar
- H01 - BASIC ELECTRIC ELEMENTS

Bert R. Riemenschneider

Person

Patents Grantslast 30 patents

Sublithographic antifuse

Process for thickening selective gate oxide regions

Sidewall anti-fuse structure and method for making

Trench capacitor DRAM cell and method of manufacture

Non-volatile semiconductor memory

High density EPROM fabricaiton method having sidewall floating gates

Fabricating a single level merged EEPROM cell having an ONO memory...

Trench capacitor DRAM cell with diffused bit lines adjacent to a tr...

Non-volatile memory with improved coupling between gates

Method of making high density EEPROM

Erasable programmable memory including buried diffusion source/drai...

EEPROM including programming electrode extending through the contro...

X-cell EEPROM array

Method for increasing source/drain to channel stop breakdown and de...

Stacked capacitor

Capacitive coupling

Fabricating a stacked capacitor