Bharat P. Penmecha

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pitch translation architecture for semiconductor package including...
- Patent number 12,051,647
- Issue date Jul 30, 2024
- Intel Corporation
- Andrew Collins
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded die architecture and method of making
- Patent number 11,901,248
- Issue date Feb 13, 2024
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heterogeneous nested interposer package for IC chips
- Patent number 11,735,533
- Issue date Aug 22, 2023
- Intel Corporation
- Debendra Mallik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pitch translation architecture for semiconductor package including...
- Patent number 11,705,398
- Issue date Jul 18, 2023
- Intel Corporation
- Andrew Collins
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pitch translation architecture for semiconductor package including...
- Patent number 11,270,942
- Issue date Mar 8, 2022
- Intel Corporation
- Andrew Collins
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pitch translation architecture for semiconductor package including...
- Patent number 10,643,945
- Issue date May 5, 2020
- Intel Corporation
- Andrew Collins
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package with corner supports
- Patent number 9,721,906
- Issue date Aug 1, 2017
- Intel Corporation
- Manish Dubey
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...
- Publication number 20240347457
- Publication date Oct 17, 2024
- Intel Corporation
- Andrew COLLINS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING
- Publication number 20240128138
- Publication date Apr 18, 2024
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS
- Publication number 20240128205
- Publication date Apr 18, 2024
- Intel Corporation
- Debendra MALLIK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS
- Publication number 20240038687
- Publication date Feb 1, 2024
- Intel Corporation
- Debendra MALLIK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...
- Publication number 20230290728
- Publication date Sep 14, 2023
- Intel Corporation
- Andrew COLLINS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS
- Publication number 20230134049
- Publication date May 4, 2023
- Intel Corporation
- Debendra MALLIK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IN-BUILT MAGNETIC INDUCTOR SCHEMES FOR GLASS CORE SUBSTRATES
- Publication number 20230089093
- Publication date Mar 23, 2023
- Intel Corporation
- Srinivas V. PIETAMBARAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHOTONIC INTEGRATED CIRCUIT PACKAGING ARCHITECTURES
- Publication number 20230092821
- Publication date Mar 23, 2023
- Intel Corporation
- Omkar G. Karhade
- G02 - OPTICS
Information Patent Application
NESTED GLASS PACKAGING ARCHITECTURE FOR HYBRID ELECTRICAL AND OPTIC...
- Publication number 20230080454
- Publication date Mar 16, 2023
- Intel Corporation
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES WITH DIRECT ATTACH TO CIRCUIT BOARDS
- Publication number 20230082706
- Publication date Mar 16, 2023
- Intel Corporation
- Sanka Ganesan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC STRUCTURES INCLUDING GLASS CORES
- Publication number 20220189880
- Publication date Jun 16, 2022
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...
- Publication number 20220148968
- Publication date May 12, 2022
- Intel Corporation
- Andrew COLLINS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING
- Publication number 20210305108
- Publication date Sep 30, 2021
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS
- Publication number 20200395313
- Publication date Dec 17, 2020
- Intel Corporation
- Debendra MALLIK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...
- Publication number 20200235051
- Publication date Jul 23, 2020
- Intel Corporation
- Andrew COLLINS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENCAPSULANT MATERIAL CONTAINING FLUOROPHORES FOR IN-SITU VISUALIZAT...
- Publication number 20190393112
- Publication date Dec 26, 2019
- Elizabeth NOFEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...
- Publication number 20190206792
- Publication date Jul 4, 2019
- Andrew Collins
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC PACKAGE WITH CORNER SUPPORTS
- Publication number 20170062356
- Publication date Mar 2, 2017
- Manish Dubey
- H01 - BASIC ELECTRIC ELEMENTS

Bharat P. Penmecha

Person

Patents Grantslast 30 patents

Pitch translation architecture for semiconductor package including...

Embedded die architecture and method of making

Heterogeneous nested interposer package for IC chips

Pitch translation architecture for semiconductor package including...

Pitch translation architecture for semiconductor package including...

Pitch translation architecture for semiconductor package including...

Electronic package with corner supports

Patents Applicationslast 30 patents

PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...

EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING

HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS

HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS

PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...

HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS

IN-BUILT MAGNETIC INDUCTOR SCHEMES FOR GLASS CORE SUBSTRATES

PHOTONIC INTEGRATED CIRCUIT PACKAGING ARCHITECTURES

NESTED GLASS PACKAGING ARCHITECTURE FOR HYBRID ELECTRICAL AND OPTIC...

MICROELECTRONIC ASSEMBLIES WITH DIRECT ATTACH TO CIRCUIT BOARDS

MICROELECTRONIC STRUCTURES INCLUDING GLASS CORES

PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...

EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING

HETEROGENEOUS NESTED INTERPOSER PACKAGE FOR IC CHIPS

PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...

ENCAPSULANT MATERIAL CONTAINING FLUOROPHORES FOR IN-SITU VISUALIZAT...

PITCH TRANSLATION ARCHITECTURE FOR SEMICONDUCTOR PACKAGE INCLUDING...

ELECTRONIC PACKAGE WITH CORNER SUPPORTS