Bhoodev Kumar

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and methods for detecting a microphone condition
- Patent number 11,641,558
- Issue date May 2, 2023
- Cirrus Logic, Inc.
- Anindya Bhattacharya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Highly linear input and output rail-to-rail amplifier
- Patent number 11,082,012
- Issue date Aug 3, 2021
- Cirrus Logic, Inc.
- Vaibhav Pandey
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Microphone bias apparatus and method
- Patent number 10,674,296
- Issue date Jun 2, 2020
- Cirrus Logic, Inc.
- Anindya Battacharya
- G05 - CONTROLLING REGULATING
Information Patent Grant
Synchronous differential signaling protocol
- Patent number 10,305,671
- Issue date May 28, 2019
- Cirrus Logic, Inc.
- Bhoodev Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous, internal clock edge alignment for integrated circuit t...
- Patent number 10,128,828
- Issue date Nov 13, 2018
- Cirrus Logic, Inc.
- Muraleedharan Ramakrishnan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-bit pulsed latch cell for use in an integrated circuit
- Patent number 9,633,156
- Issue date Apr 25, 2017
- Cirrus Logic, Inc.
- Bhoodev Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-bit pulsed latch cell for use in an integrated circuit
- Patent number 9,300,275
- Issue date Mar 29, 2016
- Cirrus Logic, Inc.
- Bhoodev Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Noise management method and circuit for asynchronous signals
- Patent number 9,276,594
- Issue date Mar 1, 2016
- Cirrus Logic, Inc.
- Cory Jay Peterson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable clock divider
- Patent number 8,004,319
- Issue date Aug 23, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Bhoodev Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for operating a processor subsystem to service masked in...
- Patent number 7,779,284
- Issue date Aug 17, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Bhoodev Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing of data retention latches in circuit devices
- Patent number 7,346,820
- Issue date Mar 18, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Milind P. Padhye
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHODS FOR DETECTING A MICROPHONE CONDITION
- Publication number 20230262404
- Publication date Aug 17, 2023
- Cirrus Logic International Semiconductor Ltd.
- Anindya BHATTACHARYA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHODS FOR DETECTING A MICROPHONE CONDITION
- Publication number 20220070600
- Publication date Mar 3, 2022
- Cirrus Logic International Semiconductor Ltd.
- Anindya BHATTACHARYA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGHLY LINEAR INPUT AND OUTPUT RAIL-TO-RAIL AMPLIFIER
- Publication number 20200358406
- Publication date Nov 12, 2020
- Cirrus Logic International Semiconductor Ltd.
- Vaibhav Pandey
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MICROPHONE BIAS APPARATUS AND METHOD
- Publication number 20190037327
- Publication date Jan 31, 2019
- Cirrus Logic International Semiconductor Ltd.
- Anindya Bhattacharya
- G05 - CONTROLLING REGULATING
Information Patent Application
SYNCHRONOUS, INTERNAL CLOCK EDGE ALIGNMENT FOR INTEGRATED CIRCUIT T...
- Publication number 20170310315
- Publication date Oct 26, 2017
- Cirrus Logic International Semiconductor, Ltd.
- Muraleedharan Ramakrishnan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYNCHRONOUS DIFFERENTIAL SIGNALING PROTOCOL
- Publication number 20160344536
- Publication date Nov 24, 2016
- Cirrus Logic International Semiconductor Ltd.
- Bhoodev Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NOISE MANAGEMENT METHOD AND CIRCUIT FOR ASYNCHRONOUS SIGNALS
- Publication number 20140266337
- Publication date Sep 18, 2014
- Cory Jay Peterson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable Clock Divider
- Publication number 20110128051
- Publication date Jun 2, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Bhoodev Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR OPERATING A PROCESSOR SUBSYSTEM
- Publication number 20080209233
- Publication date Aug 28, 2008
- BHOODEV KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Testing of data retention latches in circuit devices
- Publication number 20070226561
- Publication date Sep 27, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Milind P. Padhye
- G01 - MEASURING TESTING

Bhoodev Kumar

Person

Patents Grantslast 30 patents

Apparatus and methods for detecting a microphone condition

Highly linear input and output rail-to-rail amplifier

Microphone bias apparatus and method

Synchronous differential signaling protocol

Synchronous, internal clock edge alignment for integrated circuit t...

Multi-bit pulsed latch cell for use in an integrated circuit

Multi-bit pulsed latch cell for use in an integrated circuit

Noise management method and circuit for asynchronous signals

Programmable clock divider

Techniques for operating a processor subsystem to service masked in...

Testing of data retention latches in circuit devices

Patents Applicationslast 30 patents

APPARATUS AND METHODS FOR DETECTING A MICROPHONE CONDITION

APPARATUS AND METHODS FOR DETECTING A MICROPHONE CONDITION

HIGHLY LINEAR INPUT AND OUTPUT RAIL-TO-RAIL AMPLIFIER

MICROPHONE BIAS APPARATUS AND METHOD

SYNCHRONOUS, INTERNAL CLOCK EDGE ALIGNMENT FOR INTEGRATED CIRCUIT T...

SYNCHRONOUS DIFFERENTIAL SIGNALING PROTOCOL

NOISE MANAGEMENT METHOD AND CIRCUIT FOR ASYNCHRONOUS SIGNALS

Programmable Clock Divider

TECHNIQUES FOR OPERATING A PROCESSOR SUBSYSTEM

Testing of data retention latches in circuit devices