Bhushan Borole

Person

Rancho Cordova, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processor power management
- Patent number 12,124,310
- Issue date Oct 22, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for increasing performance in a proces...
- Patent number 12,007,824
- Issue date Jun 11, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power budget allocation in multi-processor system
- Patent number 11,874,715
- Issue date Jan 16, 2024
- Intel Corporation
- Nikos Kaburlasos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid low power homogenous grapics processing units
- Patent number 11,762,696
- Issue date Sep 19, 2023
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor power management
- Patent number 11,733,758
- Issue date Aug 22, 2023
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collaborative multi-user virtual reality
- Patent number 11,520,555
- Issue date Dec 6, 2022
- Intel Corporation
- Deepak S. Vembar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power budget allocation in multi-processor system
- Patent number 11,493,974
- Issue date Nov 8, 2022
- Intel Corporation
- Nikos Kaburlasos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Replacement policies for a hybrid hierarchical cache
- Patent number 11,263,152
- Issue date Mar 1, 2022
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequent data value compression for graphics processing units
- Patent number 11,263,720
- Issue date Mar 1, 2022
- Intel Corporation
- Saurabh Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for increasing performance in a proces...
- Patent number 11,175,719
- Issue date Nov 16, 2021
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid low power homogenous grapics processing units
- Patent number 11,169,850
- Issue date Nov 9, 2021
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor power management
- Patent number 11,106,264
- Issue date Aug 31, 2021
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically reconfigurable memory subsystem for graphics processors
- Patent number 11,080,810
- Issue date Aug 3, 2021
- Intel Corporation
- Wenyin Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resource load balancing based on usage and power limits
- Patent number 10,983,581
- Issue date Apr 20, 2021
- Intel Corporation
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collaborative multi-user virtual reality
- Patent number 10,908,865
- Issue date Feb 2, 2021
- Intel Corporation
- Deepak S. Vembar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing read only memory surface accesses
- Patent number 10,901,909
- Issue date Jan 26, 2021
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for providing a local clock signal for...
- Patent number 10,817,012
- Issue date Oct 27, 2020
- Intel Corporation
- Iqbal R. Rajwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for segmenting a memory array
- Patent number 10,790,010
- Issue date Sep 29, 2020
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shutting down GPU components in response to unchanged scene detection
- Patent number 10,761,591
- Issue date Sep 1, 2020
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for reducing voltage swing on an inter...
- Patent number 10,762,877
- Issue date Sep 1, 2020
- Intel Corporation
- Anupama A. Thaploo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing aging of register file keeper circuits
- Patent number 10,754,809
- Issue date Aug 25, 2020
- Intel Corporation
- Anupama A. Thaploo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequent data value compression for graphics processing units
- Patent number 10,748,238
- Issue date Aug 18, 2020
- Intel Corporation
- Saurabh Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic power budget allocation in multi-processor system
- Patent number 10,747,286
- Issue date Aug 18, 2020
- Intel Corporation
- Nikos Kaburlasos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Replacement policies for a hybrid hierarchical cache
- Patent number 10,691,617
- Issue date Jun 23, 2020
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pulse triggered flip flop
- Patent number 10,587,244
- Issue date Mar 10, 2020
- Intel Corporation
- Bhushan M. Borole
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Processor power management
- Patent number 10,579,121
- Issue date Mar 3, 2020
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read/write modes for reducing power consumption in graphics process...
- Patent number 10,580,104
- Issue date Mar 3, 2020
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid low power homogenous grapics processing units
- Patent number 10,521,271
- Issue date Dec 31, 2019
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for increasing performance in a proces...
- Patent number 10,444,817
- Issue date Oct 15, 2019
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collaborative multi-user virtual reality
- Patent number 10,430,147
- Issue date Oct 1, 2019
- Intel Corporation
- Deepak S. Vembar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
System, Apparatus And Method For Increasing Performance In A Proces...
- Publication number 20240264657
- Publication date Aug 8, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS
- Publication number 20240004713
- Publication date Jan 4, 2024
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR POWER MANAGEMENT
- Publication number 20230418355
- Publication date Dec 28, 2023
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC POWER BUDGET ALLOCATION IN MULTI-PROCESSOR SYSTEM
- Publication number 20230030396
- Publication date Feb 2, 2023
- Intel Corporation
- Nikos Kaburlasos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS
- Publication number 20220206853
- Publication date Jun 30, 2022
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, APPARATUS AND METHOD FOR INCREASING PERFORMANCE IN A PROCES...
- Publication number 20220197362
- Publication date Jun 23, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR POWER MANAGEMENT
- Publication number 20220113783
- Publication date Apr 14, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically Reconfigurable Memory Subsystem For Graphics Processors
- Publication number 20220005145
- Publication date Jan 6, 2022
- Intel Corporation
- Wenyin Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLLABORATIVE MULTI-USER VIRTUAL REALITY
- Publication number 20210294560
- Publication date Sep 23, 2021
- Intel Corporation
- Deepak S. Vembar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHUTTING DOWN GPU COMPONENTS IN RESPONSE TO UNCHANGED SCENE DETECTION
- Publication number 20210109589
- Publication date Apr 15, 2021
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Segmenting A Memory Array
- Publication number 20210065779
- Publication date Mar 4, 2021
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC POWER BUDGET ALLOCATION IN MULTI-PROCESSOR SYSTEM
- Publication number 20210064111
- Publication date Mar 4, 2021
- Intel Corporation
- Nikos Kaburlasos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Frequent Data Value Compression for Graphics Processing Units
- Publication number 20210035257
- Publication date Feb 4, 2021
- Intel Corporation
- Saurabh Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Replacement Policies for a Hybrid Hierarchical Cache
- Publication number 20200349091
- Publication date Nov 5, 2020
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR POWER MANAGEMENT
- Publication number 20200272215
- Publication date Aug 27, 2020
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS
- Publication number 20200210238
- Publication date Jul 2, 2020
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Increasing Performance In A Proces...
- Publication number 20200110458
- Publication date Apr 9, 2020
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLLABORATIVE MULTI-USER VIRTUAL REALITY
- Publication number 20200097243
- Publication date Mar 26, 2020
- Intel Corporation
- Deepak S. Vembar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Providing A Local Clock Signal For...
- Publication number 20200019207
- Publication date Jan 16, 2020
- Intel Corporation
- Iqbal R. Rajwani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC POWER BUDGET ALLOCATION IN MULTI-PROCESSOR SYSTEM
- Publication number 20190377395
- Publication date Dec 12, 2019
- Intel Corporation
- Nikos Kaburlasos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Segmenting A Memory Array
- Publication number 20190362772
- Publication date Nov 28, 2019
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Frequent Data Value Compression for Graphics Processing Units
- Publication number 20190272613
- Publication date Sep 5, 2019
- Intel Corporation
- Saurabh Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Frequent Data Value Compression for Graphics Processing Units
- Publication number 20190251655
- Publication date Aug 15, 2019
- Intel Corporation
- Saurabh Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing Aging of Register File Keeper Circuits
- Publication number 20190213161
- Publication date Jul 11, 2019
- Intel Corporation
- Anupama A. Thaploo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESOURCE LOAD BALANCING BASED ON USAGE AND POWER LIMITS
- Publication number 20190204894
- Publication date Jul 4, 2019
- Intel Corporation
- Sanjeev Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pulse Triggered Flip Flop
- Publication number 20190109582
- Publication date Apr 11, 2019
- Intel Corporation
- Bhushan M. Borole
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System, Apparatus And Method For Segmenting A Memory Array
- Publication number 20190035452
- Publication date Jan 31, 2019
- Intel Corporation
- Bhushan M. Borole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Page Sizing of Page Table Entries
- Publication number 20190026856
- Publication date Jan 24, 2019
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Replacement Policies for a Hybrid Hierarchical Cache
- Publication number 20190018799
- Publication date Jan 17, 2019
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically Reconfigurable Memory Subsystem for Graphics Processors
- Publication number 20180307429
- Publication date Oct 25, 2018
- Intel Corporation
- Wenyin Fu
- G06 - COMPUTING CALCULATING COUNTING

Bhushan Borole

Person

Patents Grantslast 30 patents

Processor power management

System, apparatus and method for increasing performance in a proces...

Dynamic power budget allocation in multi-processor system

Hybrid low power homogenous grapics processing units

Processor power management

Collaborative multi-user virtual reality

Dynamic power budget allocation in multi-processor system

Replacement policies for a hybrid hierarchical cache

Frequent data value compression for graphics processing units

System, apparatus and method for increasing performance in a proces...

Hybrid low power homogenous grapics processing units

Processor power management

Dynamically reconfigurable memory subsystem for graphics processors

Resource load balancing based on usage and power limits

Collaborative multi-user virtual reality

Optimizing read only memory surface accesses

System, apparatus and method for providing a local clock signal for...

System, apparatus and method for segmenting a memory array

Shutting down GPU components in response to unchanged scene detection

System, apparatus and method for reducing voltage swing on an inter...

Reducing aging of register file keeper circuits

Frequent data value compression for graphics processing units

Dynamic power budget allocation in multi-processor system

Replacement policies for a hybrid hierarchical cache

Pulse triggered flip flop

Processor power management

Read/write modes for reducing power consumption in graphics process...

Hybrid low power homogenous grapics processing units

System, apparatus and method for increasing performance in a proces...

Collaborative multi-user virtual reality

Patents Applicationslast 30 patents

System, Apparatus And Method For Increasing Performance In A Proces...

HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS

PROCESSOR POWER MANAGEMENT

DYNAMIC POWER BUDGET ALLOCATION IN MULTI-PROCESSOR SYSTEM

HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS

SYSTEM, APPARATUS AND METHOD FOR INCREASING PERFORMANCE IN A PROCES...

PROCESSOR POWER MANAGEMENT

Dynamically Reconfigurable Memory Subsystem For Graphics Processors

COLLABORATIVE MULTI-USER VIRTUAL REALITY

SHUTTING DOWN GPU COMPONENTS IN RESPONSE TO UNCHANGED SCENE DETECTION

System, Apparatus And Method For Segmenting A Memory Array

DYNAMIC POWER BUDGET ALLOCATION IN MULTI-PROCESSOR SYSTEM

Frequent Data Value Compression for Graphics Processing Units

Replacement Policies for a Hybrid Hierarchical Cache

PROCESSOR POWER MANAGEMENT

HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS

System, Apparatus And Method For Increasing Performance In A Proces...

COLLABORATIVE MULTI-USER VIRTUAL REALITY

System, Apparatus And Method For Providing A Local Clock Signal For...

DYNAMIC POWER BUDGET ALLOCATION IN MULTI-PROCESSOR SYSTEM

System, Apparatus And Method For Segmenting A Memory Array

Frequent Data Value Compression for Graphics Processing Units

Frequent Data Value Compression for Graphics Processing Units

Reducing Aging of Register File Keeper Circuits

RESOURCE LOAD BALANCING BASED ON USAGE AND POWER LIMITS

Pulse Triggered Flip Flop

System, Apparatus And Method For Segmenting A Memory Array

Dynamic Page Sizing of Page Table Entries

Replacement Policies for a Hybrid Hierarchical Cache

Dynamically Reconfigurable Memory Subsystem for Graphics Processors