Bibiche M. Geuskens

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and systems to selectively boost an operating voltage of, a...
- Patent number 10,984,855
- Issue date Apr 20, 2021
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems to selectively boost an operating voltage of, a...
- Patent number 10,217,509
- Issue date Feb 26, 2019
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems to selectively boost an operating voltage of, a...
- Patent number 9,633,716
- Issue date Apr 25, 2017
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for reducing write minimum supply voltage for memory
- Patent number 9,627,039
- Issue date Apr 18, 2017
- Intel Corporation
- Jaydeep P Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems to selectively boost an operating voltage of, a...
- Patent number 9,299,395
- Issue date Mar 29, 2016
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for reducing write minimum supply voltage for memory
- Patent number 9,153,304
- Issue date Oct 6, 2015
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing minimum operating voltage through hybrid cache design
- Patent number 8,868,836
- Issue date Oct 21, 2014
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory write operation methods and circuits
- Patent number 8,467,263
- Issue date Jun 18, 2013
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Register file circuits with P-type evaluation
- Patent number 8,456,923
- Issue date Jun 4, 2013
- Intel Corporation
- Bibiche Geuskens
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system to lower the minimum operating voltage of a memor...
- Patent number 8,094,505
- Issue date Jan 10, 2012
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND SYSTEMS TO SELECTIVELY BOOST AN OPERATING VOLTAGE OF, A...
- Publication number 20190362777
- Publication date Nov 28, 2019
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS TO SELECTIVELY BOOST AN OPERATING VOLTAGE OF, A...
- Publication number 20170243637
- Publication date Aug 24, 2017
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS TO SELECTIVELY BOOST AN OPERATING VOLTAGE OF, A...
- Publication number 20160225438
- Publication date Aug 4, 2016
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS FOR REDUCING WRITE MINIMUM SUPPLY VOLTAGE FOR MEMORY
- Publication number 20160141022
- Publication date May 19, 2016
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS TO SELECTIVELY BOOST AN OPERATING VOLTAGE OF, A...
- Publication number 20150009751
- Publication date Jan 8, 2015
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS FOR REDUCING WRITE MINIMUM SUPPLY VOLTAGE FOR MEMORY
- Publication number 20140003132
- Publication date Jan 2, 2014
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WRITE OPERATION METHODS AND CIRCUITS
- Publication number 20110317508
- Publication date Dec 29, 2011
- JAYDEEP P. KULKARNI
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM TO LOWER THE MINIMUM OPERATING VOLTAGE OF A MEMOR...
- Publication number 20110085389
- Publication date Apr 14, 2011
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Application
Register file circuits with P-type evaluation
- Publication number 20100157705
- Publication date Jun 24, 2010
- Bibiche Geuskens
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Reducing minimum operating voltage through hybrid cache design
- Publication number 20090172283
- Publication date Jul 2, 2009
- Muhammad M. Khellah
- G06 - COMPUTING CALCULATING COUNTING

Bibiche M. Geuskens

Person

Patents Grantslast 30 patents

Methods and systems to selectively boost an operating voltage of, a...

Methods and systems to selectively boost an operating voltage of, a...

Methods and systems to selectively boost an operating voltage of, a...

Apparatus for reducing write minimum supply voltage for memory

Methods and systems to selectively boost an operating voltage of, a...

Apparatus for reducing write minimum supply voltage for memory

Reducing minimum operating voltage through hybrid cache design

Memory write operation methods and circuits

Register file circuits with P-type evaluation

Method and system to lower the minimum operating voltage of a memor...

Patents Applicationslast 30 patents

METHODS AND SYSTEMS TO SELECTIVELY BOOST AN OPERATING VOLTAGE OF, A...

METHODS AND SYSTEMS TO SELECTIVELY BOOST AN OPERATING VOLTAGE OF, A...

METHODS AND SYSTEMS TO SELECTIVELY BOOST AN OPERATING VOLTAGE OF, A...

APPARATUS FOR REDUCING WRITE MINIMUM SUPPLY VOLTAGE FOR MEMORY

METHODS AND SYSTEMS TO SELECTIVELY BOOST AN OPERATING VOLTAGE OF, A...

APPARATUS FOR REDUCING WRITE MINIMUM SUPPLY VOLTAGE FOR MEMORY

MEMORY WRITE OPERATION METHODS AND CIRCUITS

METHOD AND SYSTEM TO LOWER THE MINIMUM OPERATING VOLTAGE OF A MEMOR...

Register file circuits with P-type evaluation

Reducing minimum operating voltage through hybrid cache design