Biju George

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Register liveness analysis for SIMD architectures
- Patent number 9,372,677
- Issue date Jun 21, 2016
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient implementation of RSA using GPU/CPU architecture
- Patent number 9,262,166
- Issue date Feb 16, 2016
- Intel Corporation
- Xiaozhu Kang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register liveness analysis for SIMD architectures
- Patent number 9,015,687
- Issue date Apr 21, 2015
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
BROADCAST ASYNCHRONOUS LOADS TO SHARED LOCAL MEMORY
- Publication number 20240232088
- Publication date Jul 11, 2024
- Intel Corporation
- John A. Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BROADCAST ASYNCHRONOUS LOADS TO SHARED LOCAL MEMORY
- Publication number 20240134797
- Publication date Apr 25, 2024
- Intel Corporation
- John A. Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZATION UTILIZING LOCAL TEAM BARRIERS FOR THREAD TEAM PROCE...
- Publication number 20240111609
- Publication date Apr 4, 2024
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED LOCAL REGISTERS FOR THREAD TEAM PROCESSING
- Publication number 20240112295
- Publication date Apr 4, 2024
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINISTIC BROADCASTING FROM SHARED MEMORY
- Publication number 20240111534
- Publication date Apr 4, 2024
- Intel Corporation
- Fangwen Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ORDERED THREAD DISPATCH FOR THREAD TEAMS
- Publication number 20240111590
- Publication date Apr 4, 2024
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCH AWARE LRU CACHE REPLACEMENT POLICY
- Publication number 20240104025
- Publication date Mar 28, 2024
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE ENHANCEMENTS FOR MATRIX LOAD/STORE INSTRUCTIONS
- Publication number 20240069914
- Publication date Feb 29, 2024
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER LIVENESS ANALYSIS FOR SIMD ARCHITECTURES
- Publication number 20150220313
- Publication date Aug 6, 2015
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT IMPLEMENTATION OF RSA USING GPU/CPU ARCHITECTURE
- Publication number 20130297919
- Publication date Nov 7, 2013
- Xiaozhu Kang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modeling Structured SIMD Control FLow Constructs in an Explicit SIM...
- Publication number 20130290674
- Publication date Oct 31, 2013
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER LIVENESS ANALYSIS FOR SIMD ARCHITECTURES
- Publication number 20120254847
- Publication date Oct 4, 2012
- Biju George
- G06 - COMPUTING CALCULATING COUNTING

Biju George

Person

Patents Grantslast 30 patents

Register liveness analysis for SIMD architectures

Efficient implementation of RSA using GPU/CPU architecture

Register liveness analysis for SIMD architectures

Patents Applicationslast 30 patents

BROADCAST ASYNCHRONOUS LOADS TO SHARED LOCAL MEMORY

BROADCAST ASYNCHRONOUS LOADS TO SHARED LOCAL MEMORY

SYNCHRONIZATION UTILIZING LOCAL TEAM BARRIERS FOR THREAD TEAM PROCE...

SHARED LOCAL REGISTERS FOR THREAD TEAM PROCESSING

DETERMINISTIC BROADCASTING FROM SHARED MEMORY

ORDERED THREAD DISPATCH FOR THREAD TEAMS

PREFETCH AWARE LRU CACHE REPLACEMENT POLICY

HARDWARE ENHANCEMENTS FOR MATRIX LOAD/STORE INSTRUCTIONS

REGISTER LIVENESS ANALYSIS FOR SIMD ARCHITECTURES

EFFICIENT IMPLEMENTATION OF RSA USING GPU/CPU ARCHITECTURE

Modeling Structured SIMD Control FLow Constructs in an Explicit SIM...

REGISTER LIVENESS ANALYSIS FOR SIMD ARCHITECTURES