Bilal Khalaf

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dual head capillary design for vertical wire bond
- Patent number 11,894,334
- Issue date Feb 6, 2024
- Intel Corporation
- Yuhong Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic packages having a die stack and a device within the...
- Patent number 11,848,311
- Issue date Dec 19, 2023
- Intel Corporation
- Bilal Khalaf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System in package with interconnected modules
- Patent number 11,817,438
- Issue date Nov 14, 2023
- Intel Corporationd
- Hyoung Il Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Solderless BGA interconnect
- Patent number 11,811,182
- Issue date Nov 7, 2023
- Intel Corporation
- Tyler Leuten
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded component and methods of making the same
- Patent number 11,710,674
- Issue date Jul 25, 2023
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried electrical debug access port
- Patent number 11,700,696
- Issue date Jul 11, 2023
- Intel Corporation
- Florence R. Neumann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device packages and methods for maximizing electrical cu...
- Patent number 11,373,974
- Issue date Jun 28, 2022
- Intel Corporation
- Bilal Khalaf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic packages having a die stack and a device within the...
- Patent number 11,329,027
- Issue date May 10, 2022
- Intel Corporation
- Bilal Khalaf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded component and methods of making the same
- Patent number 11,315,843
- Issue date Apr 26, 2022
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density die package configuration on system boards
- Patent number 11,145,632
- Issue date Oct 12, 2021
- Intel Corporation
- Juan E. Dominguez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried electrical debug access port
- Patent number 11,064,612
- Issue date Jul 13, 2021
- Intel Corporation
- Florence R. Pon
- G01 - MEASURING TESTING
Information Patent Grant
Through mold via (TMV) using stacked modular mold rings
- Patent number 10,879,152
- Issue date Dec 29, 2020
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compact wirebonding in stacked-chip system in package, and methods...
- Patent number 10,847,450
- Issue date Nov 24, 2020
- Intel Corporation
- Saeed Shojaie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged integrated circuit device with cantilever structure
- Patent number 10,490,516
- Issue date Nov 26, 2019
- Intel Corporation
- John G. Meyers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronics package providing increased memory component density
- Patent number 10,475,766
- Issue date Nov 12, 2019
- Intel Corporation
- Bilal Khalaf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
I/O layout footprint for multiple 1LM/2LM configurations
- Patent number 10,304,814
- Issue date May 28, 2019
- Intel Corporation
- Konika Ganguly
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic package debug access ports and methods of fabricati...
- Patent number 10,090,261
- Issue date Oct 2, 2018
- Intel Corporation
- Florence R. Pon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System-in-package logic and method to control an external packaged...
- Patent number 9,972,610
- Issue date May 15, 2018
- Intel Corporation
- Bilal Khalaf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packaged integrated circuit device with cantilever structure
- Patent number 9,871,007
- Issue date Jan 16, 2018
- Intel Corporation
- John G. Meyers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic package debug access ports
- Patent number 9,646,952
- Issue date May 9, 2017
- Intel Corporation
- Florence R. Pon
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND SYSTEMS FOR CONTROLLING UNDERFILL BLEED-OUT IN SEMICOND...
- Publication number 20240321609
- Publication date Sep 26, 2024
- SK Hynix NAND Product Solutions Corp. (dba Solidigm)
- Bilal Khalaf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCING PRINTED CIRCUIT BOARD AREA FOR SINGLE-SIDED PRINTED CIRCUI...
- Publication number 20240179844
- Publication date May 30, 2024
- SK Hynix NAND Product Solutions Corp. (dba Solidigm)
- Bilal Khalaf
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME
- Publication number 20220223487
- Publication date Jul 14, 2022
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC PACKAGES HAVING A DIE STACK AND A DEVICE WITHIN THE...
- Publication number 20220181306
- Publication date Jun 9, 2022
- Intel Corporation
- BILAL KHALAF
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BURIED ELECTRICAL DEBUG ACCESS PORT
- Publication number 20210298183
- Publication date Sep 23, 2021
- Intel Corporation
- Florence R. PON
- G01 - MEASURING TESTING
Information Patent Application
MICROELECTRONIC PACKAGES HAVING A DIE STACK AND A DEVICE WITHIN THE...
- Publication number 20210202442
- Publication date Jul 1, 2021
- Intel Corporation
- BILAL KHALAF
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE PACKAGES AND METHODS FOR MAXIMIZING ELECTRICAL CU...
- Publication number 20210074668
- Publication date Mar 11, 2021
- Intel Corporation
- Bilal Khalaf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY DIE PACKAGE CONFIGURATION ON SYSTEM BOARDS
- Publication number 20200381406
- Publication date Dec 3, 2020
- Intel Corporation
- Juan E. DOMINGUEZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM IN PACKAGE WITH INTERCONNECTED MODULES
- Publication number 20200227393
- Publication date Jul 16, 2020
- Intel Corporation
- Hyoung Il KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL HEAD CAPILLARY DESIGN FOR VERTICAL WIRE BOND
- Publication number 20200118961
- Publication date Apr 16, 2020
- Intel Corporation
- Yuhong CAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOLDERLESS BGA INTERCONNECT
- Publication number 20200119467
- Publication date Apr 16, 2020
- Intel Corporation
- Tyler LEUTEN
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME
- Publication number 20190371687
- Publication date Dec 5, 2019
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH MOLD VIA (TMV) USING STACKED MODULAR MOLD RINGS
- Publication number 20190279919
- Publication date Sep 12, 2019
- Intel Corporation
- Yi Elyn Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPACT WIREBONDING IN STACKED-CHIP SYSTEM IN PACKAGE, AND METHODS...
- Publication number 20190181072
- Publication date Jun 13, 2019
- Saeed SHOJAIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONICS PACKAGE DEVICES WITH THROUGH-SUBSTRATE-VIAS HAVING PITC...
- Publication number 20190006331
- Publication date Jan 3, 2019
- Intel Corporation
- Bilal Khalaf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
I/O Layout Footprint For Multiple 1LM/2LM Configurations
- Publication number 20190006340
- Publication date Jan 3, 2019
- Intel Corporation
- Konika GANGULY
- G11 - INFORMATION STORAGE
Information Patent Application
Microelectronics Package Providing Increased Memory Component Density
- Publication number 20180286833
- Publication date Oct 4, 2018
- Intel Corporation
- BILAL KHALAF
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED INTEGRATED CIRCUIT DEVICE WITH CANTILEVER STRUCTURE
- Publication number 20180138133
- Publication date May 17, 2018
- Intel Corporation
- John G. Meyers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BURIED ELECTRICAL DEBUG ACCESS PORT
- Publication number 20170285097
- Publication date Oct 5, 2017
- Intel Corporation
- Florence R. PON
- G01 - MEASURING TESTING
Information Patent Application
MICROELECTRONIC PACKAGE DEBUG ACCESS PORTS AND METHODS OF FABRICATI...
- Publication number 20170200685
- Publication date Jul 13, 2017
- Intel Corporation
- Florence R. Pon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED INTEGRATED CIRCUIT DEVICE WITH CANTILEVER STRUCTURE
- Publication number 20170092602
- Publication date Mar 30, 2017
- John G. Meyers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC PACKAGE DEBUG ACCESS PORTS
- Publication number 20170084573
- Publication date Mar 23, 2017
- Intel Corporation
- Florence R. Pon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM-IN-PACKAGE LOGIC AND METHOD TO CONTROL AN EXTERNAL PACKAGED...
- Publication number 20170025400
- Publication date Jan 26, 2017
- Intel Corporation
- Bilal Khalaf
- G06 - COMPUTING CALCULATING COUNTING

Bilal Khalaf

Person

Patents Grantslast 30 patents

Dual head capillary design for vertical wire bond

Microelectronic packages having a die stack and a device within the...

System in package with interconnected modules

Solderless BGA interconnect

Embedded component and methods of making the same

Buried electrical debug access port

Electronic device packages and methods for maximizing electrical cu...

Microelectronic packages having a die stack and a device within the...

Embedded component and methods of making the same

High density die package configuration on system boards

Buried electrical debug access port

Through mold via (TMV) using stacked modular mold rings

Compact wirebonding in stacked-chip system in package, and methods...

Packaged integrated circuit device with cantilever structure

Microelectronics package providing increased memory component density

I/O layout footprint for multiple 1LM/2LM configurations

Microelectronic package debug access ports and methods of fabricati...

System-in-package logic and method to control an external packaged...

Packaged integrated circuit device with cantilever structure

Microelectronic package debug access ports

Patents Applicationslast 30 patents

METHODS AND SYSTEMS FOR CONTROLLING UNDERFILL BLEED-OUT IN SEMICOND...

REDUCING PRINTED CIRCUIT BOARD AREA FOR SINGLE-SIDED PRINTED CIRCUI...

EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME

MICROELECTRONIC PACKAGES HAVING A DIE STACK AND A DEVICE WITHIN THE...

BURIED ELECTRICAL DEBUG ACCESS PORT

MICROELECTRONIC PACKAGES HAVING A DIE STACK AND A DEVICE WITHIN THE...

ELECTRONIC DEVICE PACKAGES AND METHODS FOR MAXIMIZING ELECTRICAL CU...

HIGH DENSITY DIE PACKAGE CONFIGURATION ON SYSTEM BOARDS

SYSTEM IN PACKAGE WITH INTERCONNECTED MODULES

DUAL HEAD CAPILLARY DESIGN FOR VERTICAL WIRE BOND

SOLDERLESS BGA INTERCONNECT

EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME

THROUGH MOLD VIA (TMV) USING STACKED MODULAR MOLD RINGS

COMPACT WIREBONDING IN STACKED-CHIP SYSTEM IN PACKAGE, AND METHODS...

ELECTRONICS PACKAGE DEVICES WITH THROUGH-SUBSTRATE-VIAS HAVING PITC...

I/O Layout Footprint For Multiple 1LM/2LM Configurations

Microelectronics Package Providing Increased Memory Component Density

PACKAGED INTEGRATED CIRCUIT DEVICE WITH CANTILEVER STRUCTURE

BURIED ELECTRICAL DEBUG ACCESS PORT

MICROELECTRONIC PACKAGE DEBUG ACCESS PORTS AND METHODS OF FABRICATI...

PACKAGED INTEGRATED CIRCUIT DEVICE WITH CANTILEVER STRUCTURE

MICROELECTRONIC PACKAGE DEBUG ACCESS PORTS

SYSTEM-IN-PACKAGE LOGIC AND METHOD TO CONTROL AN EXTERNAL PACKAGED...