Bill Bereza

Person

Nepean, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Self-tuning high speed transceiver for IC wireline channel
- Patent number 9,160,405
- Issue date Oct 13, 2015
- Altera Corporation
- Albert Vareljian
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Thermometer-code-to-binary encoders
- Patent number 9,083,365
- Issue date Jul 14, 2015
- Altera Corporation
- Ping Xiao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital equalizer for high-speed serial communications
- Patent number 8,654,898
- Issue date Feb 18, 2014
- Altera Corporation
- William W. Bereza
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Charge pump with reduced current mismatch
- Patent number 8,217,693
- Issue date Jul 10, 2012
- Altera Corporation
- Haitao Mei
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for digital loop filters
- Patent number 8,212,610
- Issue date Jul 3, 2012
- Altera Corporation
- William W. Bereza
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase-locked loop circuitry with multiple voltage-controlled oscill...
- Patent number 8,130,044
- Issue date Mar 6, 2012
- Altera Corporation
- William W. Bereza
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and associated methods for generating reference signals
- Patent number 8,125,362
- Issue date Feb 28, 2012
- Altera Corporation
- William W. Bereza
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Digitally controlled oscillators
- Patent number 8,031,011
- Issue date Oct 4, 2011
- Altera Corporation
- Mohsen Moussavi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Heterogeneous transceiver architecture for wide range programmabili...
- Patent number 7,940,814
- Issue date May 10, 2011
- Altera Corporation
- Sergey Shumarayev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Charge pump with reduced current mismatch
- Patent number 7,902,888
- Issue date Mar 8, 2011
- Altera Corporation
- Haitao Mei
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase-adjusted pre-emphasis and equalization for data communication
- Patent number 7,848,402
- Issue date Dec 7, 2010
- Altera Corporation
- Shoujun Wang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Return loss techniques in wirebond packages for high-speed data com...
- Patent number 7,825,527
- Issue date Nov 2, 2010
- Altera Corporation
- William W. Bereza
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Clock signal circuitry for multi-channel data signaling
- Patent number 7,812,659
- Issue date Oct 12, 2010
- Altera Corporation
- Sergey Shumarayev
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for equalization in high-speed backplane data...
- Patent number 7,697,603
- Issue date Apr 13, 2010
- Altera Corporation
- Shoujun Wang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for simulating link performance
- Patent number 7,693,691
- Issue date Apr 6, 2010
- Altera Corporation
- Yuming Tao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thermometer-code-to-binary encoders
- Patent number 7,675,440
- Issue date Mar 9, 2010
- Altera Corporation
- Ping Xiao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for all-digital serializer-de-serializer and associated m...
- Patent number 7,656,323
- Issue date Feb 2, 2010
- Altera Corporation
- William W. Bereza
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Power supply circuitry for data signal transceivers on integrated c...
- Patent number 7,639,993
- Issue date Dec 29, 2009
- Altera Corporation
- Sergey Yuryevich Shumarayev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reference clock receiver compliant with LVPECL, LVDS and PCI-Expres...
- Patent number 7,619,460
- Issue date Nov 17, 2009
- Altera Corporation
- Haitao Mei
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Heterogeneous transceiver architecture for wide range programmabili...
- Patent number 7,616,657
- Issue date Nov 10, 2009
- Altera Corporation
- Sergey Shumarayev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dual-mode LVDS/CML transmitter methods and apparatus
- Patent number 7,598,779
- Issue date Oct 6, 2009
- Altera Corporation
- Shoujun Wang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Modular serial interface in programmable logic device
- Patent number 7,590,207
- Issue date Sep 15, 2009
- Altera Corporation
- Sergey Y Shumarayev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock data recovery loop with separate proportional path
- Patent number 7,580,497
- Issue date Aug 25, 2009
- Altera Corporation
- Shoujun Wang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multitap fractional baud period pre-emphasis for data transmission
- Patent number 7,528,635
- Issue date May 5, 2009
- Altera Corporation
- Tad Kwasniewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Alignment of clock signal with data signal
- Patent number 7,486,752
- Issue date Feb 3, 2009
- Altera Corporation
- Tad Kwasniewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamic frequency divider with improved leakage tolerance
- Patent number 7,453,294
- Issue date Nov 18, 2008
- Altera Corporation
- Shoujun Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage controlled oscillator circuitry and methods
- Patent number 7,414,484
- Issue date Aug 19, 2008
- Altera Corporation
- Tad Kwasniewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for wide tuning-range ring oscillators
- Patent number 7,388,443
- Issue date Jun 17, 2008
- Altera Corporation
- Mashkoor Baig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Charge pump with reduced current mismatch
- Patent number 7,385,429
- Issue date Jun 10, 2008
- Altera Corporation
- Haitao Mei
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reference clock receiver compliant with LVPECL, LVDS and PCI-Expres...
- Patent number 7,352,229
- Issue date Apr 1, 2008
- Altera Corporation
- Haitao Mei
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
DIGITALLY CONTROLLED OSCILLATORS
- Publication number 20110309886
- Publication date Dec 22, 2011
- Mohsen Moussavi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HETEROGENEOUS TRANSCEIVER ARCHITECTURE FOR WIDE RANGE PROGRAMMABILI...
- Publication number 20110211621
- Publication date Sep 1, 2011
- Altera Corporation
- Sergey Shumarayev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CHARGE PUMP WITH REDUCED CURRENT MISMATCH
- Publication number 20110156806
- Publication date Jun 30, 2011
- Haitao Mei
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Techniques For Digital Loop Filters
- Publication number 20100073054
- Publication date Mar 25, 2010
- Altera Corporation
- William W. Bereza
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HETEROGENEOUS TRANSCEIVER ARCHITECTURE FOR WIDE RANGE PROGRAMMABILI...
- Publication number 20100058099
- Publication date Mar 4, 2010
- Altera Corporation
- Sergey Shumarayev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITALLY CONTROLLED OSCILLATORS
- Publication number 20090322435
- Publication date Dec 31, 2009
- Mohsen Moussavi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE-LOCKED LOOP CIRCUITRY WITH MULTIPLE VOLTAGE-CONTROLLED OSCILL...
- Publication number 20090315627
- Publication date Dec 24, 2009
- William W. Bereza
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RETURN LOSS TECHNIQUES IN WIREBOND PACKAGES FOR HIGH-SPEED DATA COM...
- Publication number 20090309240
- Publication date Dec 17, 2009
- William W. Bereza
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIGITAL EQUALIZER FOR HIGH-SPEED SERIAL COMMUNICATIONS
- Publication number 20090279597
- Publication date Nov 12, 2009
- Altera Corporation
- William W. Bereza
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS FOR ALL-DIGITAL SERIALIZER-DE-SERIALIZER AND ASSOCIATED M...
- Publication number 20080298476
- Publication date Dec 4, 2008
- William W. Bereza
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reference clock receiver compliant with LVPECL, LVDS and PCI-Expres...
- Publication number 20080197906
- Publication date Aug 21, 2008
- Altera Corporation
- Haitao Mei
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multitap fractional baud period pre-emphasis for data transmission
- Publication number 20070241795
- Publication date Oct 18, 2007
- Altera Corporation
- Tad Kwasniewski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Heterogeneous transceiver architecture for wide range programmabili...
- Publication number 20070237186
- Publication date Oct 11, 2007
- Altera Corporation
- Sergey Shumarayev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Voltage controlled oscillator circuitry and methods
- Publication number 20070069831
- Publication date Mar 29, 2007
- Altera Corporation
- Tad Kwasniewski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock circuitry for programmable logic devices
- Publication number 20070019766
- Publication date Jan 25, 2007
- Altera Corporation
- William W. Bereza
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock data recovery loop with separate proportional path
- Publication number 20070002993
- Publication date Jan 4, 2007
- ALTERA CORPORATION, a corporation of Delaware
- Shoujun Wang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Apparatus and methods for wide tuning-range ring oscillators
- Publication number 20060192623
- Publication date Aug 31, 2006
- Altera Corporation
- Mashkoor Baig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Input stage threshold adjustment for high speed data communications
- Publication number 20050160327
- Publication date Jul 21, 2005
- Altera Corporation
- Mashkoor Baig
- G01 - MEASURING TESTING
Information Patent Application
Pre-emphasis circuitry and methods
- Publication number 20050093580
- Publication date May 5, 2005
- Altera Corporation
- Mashkoor Baig
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Adaptive communication methods and apparatus
- Publication number 20050095988
- Publication date May 5, 2005
- Altera Corporation
- Bill Bereza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Active peaking using differential pairs of transistors
- Publication number 20030141919
- Publication date Jul 31, 2003
- Shoujun Wang
- H03 - BASIC ELECTRONIC CIRCUITRY

Bill Bereza

Person

Patents Grantslast 30 patents

Self-tuning high speed transceiver for IC wireline channel

Thermometer-code-to-binary encoders

Digital equalizer for high-speed serial communications

Charge pump with reduced current mismatch

Techniques for digital loop filters

Phase-locked loop circuitry with multiple voltage-controlled oscill...

Apparatus and associated methods for generating reference signals

Digitally controlled oscillators

Heterogeneous transceiver architecture for wide range programmabili...

Charge pump with reduced current mismatch

Phase-adjusted pre-emphasis and equalization for data communication

Return loss techniques in wirebond packages for high-speed data com...

Clock signal circuitry for multi-channel data signaling

Methods and apparatus for equalization in high-speed backplane data...

Systems and methods for simulating link performance

Thermometer-code-to-binary encoders

Apparatus for all-digital serializer-de-serializer and associated m...

Power supply circuitry for data signal transceivers on integrated c...

Reference clock receiver compliant with LVPECL, LVDS and PCI-Expres...

Heterogeneous transceiver architecture for wide range programmabili...

Dual-mode LVDS/CML transmitter methods and apparatus

Modular serial interface in programmable logic device

Clock data recovery loop with separate proportional path

Multitap fractional baud period pre-emphasis for data transmission

Alignment of clock signal with data signal

Dynamic frequency divider with improved leakage tolerance

Voltage controlled oscillator circuitry and methods

Apparatus and method for wide tuning-range ring oscillators

Charge pump with reduced current mismatch

Reference clock receiver compliant with LVPECL, LVDS and PCI-Expres...

Patents Applicationslast 30 patents

DIGITALLY CONTROLLED OSCILLATORS

HETEROGENEOUS TRANSCEIVER ARCHITECTURE FOR WIDE RANGE PROGRAMMABILI...

CHARGE PUMP WITH REDUCED CURRENT MISMATCH

Techniques For Digital Loop Filters

HETEROGENEOUS TRANSCEIVER ARCHITECTURE FOR WIDE RANGE PROGRAMMABILI...

DIGITALLY CONTROLLED OSCILLATORS

PHASE-LOCKED LOOP CIRCUITRY WITH MULTIPLE VOLTAGE-CONTROLLED OSCILL...

RETURN LOSS TECHNIQUES IN WIREBOND PACKAGES FOR HIGH-SPEED DATA COM...

DIGITAL EQUALIZER FOR HIGH-SPEED SERIAL COMMUNICATIONS

APPARATUS FOR ALL-DIGITAL SERIALIZER-DE-SERIALIZER AND ASSOCIATED M...

Reference clock receiver compliant with LVPECL, LVDS and PCI-Expres...

Multitap fractional baud period pre-emphasis for data transmission

Heterogeneous transceiver architecture for wide range programmabili...

Voltage controlled oscillator circuitry and methods

Clock circuitry for programmable logic devices

Clock data recovery loop with separate proportional path

Apparatus and methods for wide tuning-range ring oscillators

Input stage threshold adjustment for high speed data communications

Pre-emphasis circuitry and methods

Adaptive communication methods and apparatus

Active peaking using differential pairs of transistors