Bin He

Person

Orlando, FL, US

People

Patents Grantslast 30 patents

Information Patent Grant
Block data load with transpose into memory
- Patent number 12,229,570
- Issue date Feb 18, 2025
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing unit with small footprint arithmetic logic unit
- Patent number 12,217,021
- Issue date Feb 4, 2025
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packed 16 bits instruction pipeline
- Patent number 11,880,683
- Issue date Jan 23, 2024
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic logic unit register sequencing
- Patent number 11,789,732
- Issue date Oct 17, 2023
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing unit with mixed precision operations
- Patent number 11,768,664
- Issue date Sep 26, 2023
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Matrix multiplication unit with flexible precision operations
- Patent number 11,762,658
- Issue date Sep 19, 2023
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing unit with small footprint arithmetic logic unit
- Patent number 11,720,328
- Issue date Aug 8, 2023
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual vector arithmetic logic unit
- Patent number 11,675,568
- Issue date Jun 13, 2023
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dedicated vector sub-processor system
- Patent number 11,630,667
- Issue date Apr 18, 2023
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline including separate hardware data paths for different instr...
- Patent number 11,494,192
- Issue date Nov 8, 2022
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pairing SIMD lanes to perform double precision operations
- Patent number 11,409,536
- Issue date Aug 9, 2022
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithemetic logic unit register sequencing
- Patent number 11,237,827
- Issue date Feb 1, 2022
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stream processor with decoupled crossbar for cross lane operations
- Patent number 10,970,081
- Issue date Apr 6, 2021
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor support for bypassing vector source operands
- Patent number 10,817,302
- Issue date Oct 27, 2020
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline including separate hardware data paths for different instr...
- Patent number 10,656,951
- Issue date May 19, 2020
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and processing apparatus for gating redundant threads
- Patent number 10,360,177
- Issue date Jul 23, 2019
- ATI Technologies ULC
- Syed Zohaib M. Gilani
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
WAVE LEVEL MATRIX MULTIPLY INSTRUCTIONS
- Publication number 20240329998
- Publication date Oct 3, 2024
- ADVANCED MICRO DEVICES, INC.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL VECTOR ARITHMETIC LOGIC UNIT
- Publication number 20240168719
- Publication date May 23, 2024
- ADVANCED MICRO DEVICES, INC.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING UNIT WITH SMALL FOOTPRINT ARITHMETIC LOGIC UNIT
- Publication number 20240143283
- Publication date May 2, 2024
- ADVANCED MICRO DEVICES, INC.
- Bin HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MATRIX MULTIPLICATION UNIT WITH FLEXIBLE PRECISION OPERATIONS
- Publication number 20240111530
- Publication date Apr 4, 2024
- ADVANCED MICRO DEVICES, INC.
- Bin HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Block Data Load with Transpose into Memory
- Publication number 20240103879
- Publication date Mar 28, 2024
- ADVANCED MICRO DEVICES, INC.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONVOLUTIONAL NEURAL NETWORK OPERATIONS
- Publication number 20230097279
- Publication date Mar 30, 2023
- ADVANCED MICRO DEVICES, INC.
- Brian Emberling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL VECTOR ARITHMETIC LOGIC UNIT
- Publication number 20220188076
- Publication date Jun 16, 2022
- ADVANCED MICRO DEVICES, INC.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARITHMETIC LOGIC UNIT REGISTER SEQUENCING
- Publication number 20220171621
- Publication date Jun 2, 2022
- ADVANCED MICRO DEVICES, INC.
- Bin HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING UNIT WITH SMALL FOOTPRINT ARITHMETIC LOGIC UNIT
- Publication number 20210405968
- Publication date Dec 30, 2021
- ADVANCED MICRO DEVICES, INC.
- Bin HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEDICATED VECTOR SUB-PROCESSOR SYSTEM
- Publication number 20210157588
- Publication date May 27, 2021
- ADVANCED MICRO DEVICES, INC.
- Jiasheng CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARITHEMETIC LOGIC UNIT REGISTER SEQUENCING
- Publication number 20210157581
- Publication date May 27, 2021
- ADVANCED MICRO DEVICES, INC.
- Bin HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLLAPSING BUBBLES IN A PROCESSING UNIT PIPELINE
- Publication number 20210096877
- Publication date Apr 1, 2021
- ADVANCED MICRO DEVICES, INC.
- Bin HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MATRIX MULTIPLICATION UNIT WITH FLEXIBLE PRECISION OPERATIONS
- Publication number 20210089304
- Publication date Mar 25, 2021
- ADVANCED MICRO DEVICES, INC.
- Bin HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE INCLUDING SEPARATE HARDWARE DATA PATHS FOR DIFFERENT INSTR...
- Publication number 20200293329
- Publication date Sep 17, 2020
- ADVANCED MICRO DEVICES, INC.
- Jiasheng CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING UNIT WITH MIXED PRECISION OPERATIONS
- Publication number 20200293286
- Publication date Sep 17, 2020
- ADVANCED MICRO DEVICES, INC.
- Bin HE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKED 16 BITS INSTRUCTION PIPELINE
- Publication number 20190129718
- Publication date May 2, 2019
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAM PROCESSOR WITH OVERLAPPING EXECUTION
- Publication number 20190004807
- Publication date Jan 3, 2019
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAM PROCESSOR WITH DECOUPLED CROSSBAR FOR CROSS LANE OPERATIONS
- Publication number 20190004814
- Publication date Jan 3, 2019
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAM PROCESSOR WITH HIGH BANDWIDTH AND LOW POWER VECTOR REGISTER...
- Publication number 20180357064
- Publication date Dec 13, 2018
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPER SINGLE INSTRUCTION MULTIPLE DATA (SUPER-SIMD) FOR GRAPHICS PR...
- Publication number 20180121386
- Publication date May 3, 2018
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR PERFORMING LOW POWER AND LOW LATENCY MULTI-PR...
- Publication number 20180113709
- Publication date Apr 26, 2018
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE INCLUDING SEPARATE HARDWARE DATA PATHS FOR DIFFERENT INSTR...
- Publication number 20180113714
- Publication date Apr 26, 2018
- Advanced Micro Devices, Inc.
- Jiasheng CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND PROCESSING APPARATUS FOR GATING REDUNDANT THREADS
- Publication number 20170371393
- Publication date Dec 28, 2017
- Advanced Micro Devices, Inc.
- Syed Zohaib M. Gilani
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Block data load with transpose into memory

Processing unit with small footprint arithmetic logic unit

Packed 16 bits instruction pipeline

Arithmetic logic unit register sequencing

Processing unit with mixed precision operations

Matrix multiplication unit with flexible precision operations

Processing unit with small footprint arithmetic logic unit

Dual vector arithmetic logic unit

Dedicated vector sub-processor system

Pipeline including separate hardware data paths for different instr...

Pairing SIMD lanes to perform double precision operations

Arithemetic logic unit register sequencing

Stream processor with decoupled crossbar for cross lane operations

Processor support for bypassing vector source operands

Pipeline including separate hardware data paths for different instr...

Method and processing apparatus for gating redundant threads

Patents Applicationslast 30 patents

WAVE LEVEL MATRIX MULTIPLY INSTRUCTIONS

DUAL VECTOR ARITHMETIC LOGIC UNIT

PROCESSING UNIT WITH SMALL FOOTPRINT ARITHMETIC LOGIC UNIT

MATRIX MULTIPLICATION UNIT WITH FLEXIBLE PRECISION OPERATIONS

Block Data Load with Transpose into Memory

CONVOLUTIONAL NEURAL NETWORK OPERATIONS

DUAL VECTOR ARITHMETIC LOGIC UNIT

ARITHMETIC LOGIC UNIT REGISTER SEQUENCING

PROCESSING UNIT WITH SMALL FOOTPRINT ARITHMETIC LOGIC UNIT

DEDICATED VECTOR SUB-PROCESSOR SYSTEM

ARITHEMETIC LOGIC UNIT REGISTER SEQUENCING

COLLAPSING BUBBLES IN A PROCESSING UNIT PIPELINE

MATRIX MULTIPLICATION UNIT WITH FLEXIBLE PRECISION OPERATIONS

PIPELINE INCLUDING SEPARATE HARDWARE DATA PATHS FOR DIFFERENT INSTR...

PROCESSING UNIT WITH MIXED PRECISION OPERATIONS

PACKED 16 BITS INSTRUCTION PIPELINE

STREAM PROCESSOR WITH OVERLAPPING EXECUTION

STREAM PROCESSOR WITH DECOUPLED CROSSBAR FOR CROSS LANE OPERATIONS

STREAM PROCESSOR WITH HIGH BANDWIDTH AND LOW POWER VECTOR REGISTER...

SUPER SINGLE INSTRUCTION MULTIPLE DATA (SUPER-SIMD) FOR GRAPHICS PR...

METHOD AND SYSTEM FOR PERFORMING LOW POWER AND LOW LATENCY MULTI-PR...

PIPELINE INCLUDING SEPARATE HARDWARE DATA PATHS FOR DIFFERENT INSTR...

METHOD AND PROCESSING APPARATUS FOR GATING REDUNDANT THREADS