Binh N. Ngo

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Asymmetric junctions of high voltage transistor in NAND flash memory
- Patent number 11,653,496
- Issue date May 16, 2023
- Intel Corporation
- Chang Wan Ha
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for performing a concurrent multiple page read of...
- Patent number 10,438,656
- Issue date Oct 8, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for providing multiple voltage signals
- Patent number 6,891,426
- Issue date May 10, 2005
- Intel Corporation
- Raymond Zeng
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Voltage driver for a memory
- Patent number 6,449,211
- Issue date Sep 10, 2002
- Intel Corporation
- Owen W. Jungroth
- G11 - INFORMATION STORAGE
Information Patent Grant
Degenerative load temperature correction for charge pumps
- Patent number 6,356,062
- Issue date Mar 12, 2002
- Intel Corporation
- Daniel R. Elmhurst
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Method and apparatus for providing redundancy in non-volatile memor...
- Patent number 6,072,723
- Issue date Jun 6, 2000
- Intel Corporation
- Sandeep K. Guliani
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PUMP DISCHARGE SEQUENCE IMPROVEMENTS IN EXTERNAL POWER SUPPLY MODE...
- Publication number 20230178158
- Publication date Jun 8, 2023
- Intel Corporation
- Soo-yong Park
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC NEGATIVE CHARGE PUMP FOR NON-VOLATILE MEMORY
- Publication number 20230138471
- Publication date May 4, 2023
- Intel NDTM US LLC
- Binh Ngo
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC VOLTAGE REGULATOR WITH TIME-INTERLEAVED CHARGE PUMP
- Publication number 20230123096
- Publication date Apr 20, 2023
- Intel NDTM US LLC
- Moonkyun Maeng
- G11 - INFORMATION STORAGE
Information Patent Application
GROUPED GLOBAL WORDLINE DRIVER WITH SHARED BIAS SCHEME
- Publication number 20230082368
- Publication date Mar 16, 2023
- Intel Corporation
- Chang Wan Ha
- G11 - INFORMATION STORAGE
Information Patent Application
WORD LINE VOLTAGE DETECTION CIRCUIT FOR ENCHANCED READ OPERATION
- Publication number 20230079077
- Publication date Mar 16, 2023
- Saied Hemati
- G11 - INFORMATION STORAGE
Information Patent Application
INDEPENDENT MULTI-PAGE READ OPERATION ENHANCEMENT TECHNOLOGY
- Publication number 20220415380
- Publication date Dec 29, 2022
- Intel Corporation
- Naveen Prabhu Vittal Prabhu
- G11 - INFORMATION STORAGE
Information Patent Application
ASYMMETRIC JUNCTIONS OF HIGH VOLTAGE TRANSISTOR IN NAND FLASH MEMORY
- Publication number 20220102365
- Publication date Mar 31, 2022
- Intel Corporation
- Chang Wan HA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM AND METHOD FOR PERFORMING A CONCURRENT MULTIPLE PAGE READ OF...
- Publication number 20200090743
- Publication date Mar 19, 2020
- Intel Corporation
- Aliasgar S. MADRASWALA
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR PERFORMING A CONCURRENT MULTIPLE PAGE READ OF...
- Publication number 20190043564
- Publication date Feb 7, 2019
- Intel Corporation
- ALIASGAR S. MADRASWALA
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT FOR PROVIDING MULTIPLE VOLTAGE SIGNALS
- Publication number 20030174013
- Publication date Sep 18, 2003
- Raymond Zeng
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Binh N. Ngo

Person

Patents Grantslast 30 patents

Asymmetric junctions of high voltage transistor in NAND flash memory

System and method for performing a concurrent multiple page read of...

Circuit for providing multiple voltage signals

Voltage driver for a memory

Degenerative load temperature correction for charge pumps

Method and apparatus for providing redundancy in non-volatile memor...

Patents Applicationslast 30 patents

PUMP DISCHARGE SEQUENCE IMPROVEMENTS IN EXTERNAL POWER SUPPLY MODE...

DYNAMIC NEGATIVE CHARGE PUMP FOR NON-VOLATILE MEMORY

STATIC VOLTAGE REGULATOR WITH TIME-INTERLEAVED CHARGE PUMP

GROUPED GLOBAL WORDLINE DRIVER WITH SHARED BIAS SCHEME

WORD LINE VOLTAGE DETECTION CIRCUIT FOR ENCHANCED READ OPERATION

INDEPENDENT MULTI-PAGE READ OPERATION ENHANCEMENT TECHNOLOGY

ASYMMETRIC JUNCTIONS OF HIGH VOLTAGE TRANSISTOR IN NAND FLASH MEMORY

SYSTEM AND METHOD FOR PERFORMING A CONCURRENT MULTIPLE PAGE READ OF...

SYSTEM AND METHOD FOR PERFORMING A CONCURRENT MULTIPLE PAGE READ OF...

CIRCUIT FOR PROVIDING MULTIPLE VOLTAGE SIGNALS