Blaine Stackhouse

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Fort Collins, CO, US

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Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatuses for reducing step loads of processors
- Patent number 8,886,979
- Issue date Nov 11, 2014
- Intel Corporation
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for reducing step loads of processors
- Patent number 8,479,029
- Issue date Jul 2, 2013
- Intel Corporation
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for reducing step loads of processors
- Patent number 7,992,017
- Issue date Aug 2, 2011
- Intel Corporation
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable weak write test mode (PWWTM) bias generation having lo...
- Patent number 7,133,319
- Issue date Nov 7, 2006
- Hewlett-Packard Development Company, L.P.
- John Wuu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Methods And Apparatuses For Reducing Step Loads Of Processors
- Publication number 20130275787
- Publication date Oct 17, 2013
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods And Apparatuses For Reducing Step Loads Of Processors
- Publication number 20110252255
- Publication date Oct 13, 2011
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatuses for reducing step loads of processors
- Publication number 20090070607
- Publication date Mar 12, 2009
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable weak write test mode (PWWTM) bias generation having lo...
- Publication number 20040260986
- Publication date Dec 23, 2004
- John Wuu
- G11 - INFORMATION STORAGE
Information Patent Application
Bias generation having adjustable range and resolution through meta...
- Publication number 20040257882
- Publication date Dec 23, 2004
- Blaine Stackhouse
- G11 - INFORMATION STORAGE