Bo-Wei Hsieh

Person

Tainan, TW

People

Patents Grantslast 30 patents

Information Patent Grant
DRAM, memory controller and associated training method
- Patent number 11,776,613
- Issue date Oct 3, 2023
- Mediatek Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay tracking method and memory system
- Patent number 11,373,692
- Issue date Jun 28, 2022
- Mediatek Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM, memory controller and associated training method
- Patent number 11,017,839
- Issue date May 25, 2021
- Mediatek Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay tracking method and memory system
- Patent number 10,964,363
- Issue date Mar 30, 2021
- Mediatek Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
Refresh control method for memory system to perform refresh action...
- Patent number 10,878,879
- Issue date Dec 29, 2020
- Mediatek Inc.
- Der-Ping Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory controller and associated memory system opera...
- Patent number 10,846,018
- Issue date Nov 24, 2020
- Mediatek Inc.
- Bo-Wei Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of parity training for a DRAM supporting a link error checki...
- Patent number 10,810,078
- Issue date Oct 20, 2020
- Mediatek Inc.
- Bo-Wei Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module, memory controller and associated control method for...
- Patent number 10,163,485
- Issue date Dec 25, 2018
- Mediatek Inc.
- Shang-Pin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory interface circuit having signal detector for detecting clock...
- Patent number 10,141,044
- Issue date Nov 27, 2018
- Mediatek Inc.
- Shang-Pin Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory capable of entering/exiting power down state during self-ref...
- Patent number 10,109,341
- Issue date Oct 23, 2018
- Mediatek Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller, memory module and memory system
- Patent number 10,083,728
- Issue date Sep 25, 2018
- Mediatek Inc.
- Yan-Bin Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DRAM and access and operating method thereof
- Patent number 10,008,255
- Issue date Jun 26, 2018
- Mediatek Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory interface circuit capable of controlling driving ability and...
- Patent number 9,871,518
- Issue date Jan 16, 2018
- Mediatek Inc.
- Shang-Pin Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for performing signal control of an electronic device, and a...
- Patent number 9,829,914
- Issue date Nov 28, 2017
- Mediatek Inc.
- Shang-Pin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for performing memory interface calibration in an electronic...
- Patent number 9,824,728
- Issue date Nov 21, 2017
- Mediatek Inc.
- Shang-Pin Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Termination topology of memory system and associated memory module...
- Patent number 9,812,187
- Issue date Nov 7, 2017
- Mediatek Inc.
- Shang-Pin Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Dram and access and operating method thereof
- Patent number 9,792,975
- Issue date Oct 17, 2017
- Mediatek Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for performing memory interface control of an electronic dev...
- Patent number 9,613,665
- Issue date Apr 4, 2017
- Mediatek Inc.
- Shang-Pin Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Termination circuit and DC balance method thereof
- Patent number 8,952,718
- Issue date Feb 10, 2015
- Mediatek Inc.
- Yan-Bin Luo
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for detecting data strobe signal
- Patent number 7,573,759
- Issue date Aug 11, 2009
- VIA Technologies, Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of memory space configuration
- Patent number 7,552,292
- Issue date Jun 23, 2009
- Via Technologies, Inc.
- Bo-Wei Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for detecting data strobe signal
- Patent number 7,382,665
- Issue date Jun 3, 2008
- VIA Technologies, Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for detecting data strobe signal
- Patent number 7,257,035
- Issue date Aug 14, 2007
- Via Technologies, Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ELECTRONIC SYSTEM AND METHOD FOR CONTROLLING BURST LENGTH TO ACCESS...
- Publication number 20230289063
- Publication date Sep 14, 2023
- MEDIATEK INC.
- Bo-Wei HSIEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM, MEMORY CONTROLLER AND ASSOCIATED TRAINING METHOD
- Publication number 20210295894
- Publication date Sep 23, 2021
- MEDIATEK INC.
- Bo-Wei HSIEH
- G11 - INFORMATION STORAGE
Information Patent Application
DELAY TRACKING METHOD AND MEMORY SYSTEM
- Publication number 20210174851
- Publication date Jun 10, 2021
- MEDIA TEK INC.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Application
DELAY TRACKING METHOD AND MEMORY SYSTEM
- Publication number 20200058335
- Publication date Feb 20, 2020
- MEDIATEK INC.
- Bo-Wei HSIEH
- G11 - INFORMATION STORAGE
Information Patent Application
Method of Parity Training for a DRAM Supporting a Link Error Checki...
- Publication number 20200012558
- Publication date Jan 9, 2020
- MEDIATEK INC.
- Bo-Wei Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND REFRESH CONTROL METHOD THEREOF
- Publication number 20190074051
- Publication date Mar 7, 2019
- MEDIATEK INC.
- Chia-Fu CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
REFRESH CONTROL METHOD FOR MEMORY SYSTEM
- Publication number 20180374533
- Publication date Dec 27, 2018
- MEDIATEK INC.
- Der-Ping Liu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY CONTROLLER AND ASSOCIATED MEMORY SYSTEM
- Publication number 20180293026
- Publication date Oct 11, 2018
- MEDIATEK INC.
- Bo-Wei HSIEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM, MEMORY CONTROLLER AND ASSOCIATED TRAINING METHOD
- Publication number 20180204610
- Publication date Jul 19, 2018
- MEDIATEK INC.
- Bo-Wei HSIEH
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM AND ACCESS AND OPERATING METHOD THEREOF
- Publication number 20180005689
- Publication date Jan 4, 2018
- MEDIATEK INC.
- Bo-Wei HSIEH
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE, MEMORY CONTROLLER AND ASSOCIATED CONTROL METHOD FOR...
- Publication number 20170345480
- Publication date Nov 30, 2017
- MEDIATEK INC.
- Shang-Pin Chen
- G11 - INFORMATION STORAGE
Information Patent Application
TERMINATION TOPOLOGY OF MEMORY SYSTEM AND ASSOCIATED MEMORY MODULE...
- Publication number 20170243629
- Publication date Aug 24, 2017
- MEDIATEK INC.
- Shang-Pin Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY INTERFACE CIRCUIT HAVING SIGNAL DETECTOR FOR DETECTING CLOCK...
- Publication number 20170221544
- Publication date Aug 3, 2017
- MEDIATEK INC.
- Shang-Pin Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY INTERFACE CIRCUIT CAPABLE OF CONTROLLING DRIVING ABILITY AND...
- Publication number 20170222647
- Publication date Aug 3, 2017
- MEDIATEK INC.
- Shang-Pin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PERFORMING SIGNAL CONTROL OF AN ELECTRONIC DEVICE, AND A...
- Publication number 20170147030
- Publication date May 25, 2017
- MEDIATEK INC.
- Shang-Pin Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CAPABLE OF ENTERING/EXITING POWER DOWN STATE DURING SELF-REF...
- Publication number 20170133078
- Publication date May 11, 2017
- MEDIATEK INC.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR PERFORMING MEMORY INTERFACE CONTROL OF AN ELECTRONIC DEV...
- Publication number 20150255129
- Publication date Sep 10, 2015
- MEDIATEK INC.
- Shang-Pin Chen
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR PERFORMING MEMORY INTERFACE CALIBRATION IN AN ELECTRONIC...
- Publication number 20150170719
- Publication date Jun 18, 2015
- MEDIATEK INC.
- Shang-Pin Chen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER, MEMORY MODULE AND MEMORY SYSTEM
- Publication number 20150074346
- Publication date Mar 12, 2015
- MEDIATEK INC.
- Yan-Bin Luo
- G11 - INFORMATION STORAGE
Information Patent Application
TERMINATION CIRCUIT AND DC BALANCE METHOD THEREOF
- Publication number 20130113516
- Publication date May 9, 2013
- MEDIATEK INC.
- Yan-Bin LUO
- G11 - INFORMATION STORAGE
Information Patent Application
Method for detecting data strobe signal
- Publication number 20070036023
- Publication date Feb 15, 2007
- VIA TECHNOLOGIES, INC.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Application
Method for detecting data strobe signal
- Publication number 20070019482
- Publication date Jan 25, 2007
- VIA Technologies, Inc.
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE
Information Patent Application
Method of memory space configuration
- Publication number 20060095694
- Publication date May 4, 2006
- Via Technologies, Inc.
- Bo-Wei Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for detecting data strobe signal
- Publication number 20060044892
- Publication date Mar 2, 2006
- Bo-Wei Hsieh
- G11 - INFORMATION STORAGE

Bo-Wei Hsieh

Person

Patents Grantslast 30 patents

DRAM, memory controller and associated training method

Delay tracking method and memory system

DRAM, memory controller and associated training method

Delay tracking method and memory system

Refresh control method for memory system to perform refresh action...

Memory device, memory controller and associated memory system opera...

Method of parity training for a DRAM supporting a link error checki...

Memory module, memory controller and associated control method for...

Memory interface circuit having signal detector for detecting clock...

Memory capable of entering/exiting power down state during self-ref...

Memory controller, memory module and memory system

DRAM and access and operating method thereof

Memory interface circuit capable of controlling driving ability and...

Method for performing signal control of an electronic device, and a...

Method for performing memory interface calibration in an electronic...

Termination topology of memory system and associated memory module...

Dram and access and operating method thereof

Method for performing memory interface control of an electronic dev...

Termination circuit and DC balance method thereof

Method for detecting data strobe signal

Method of memory space configuration

Method for detecting data strobe signal

Method for detecting data strobe signal

Patents Applicationslast 30 patents

ELECTRONIC SYSTEM AND METHOD FOR CONTROLLING BURST LENGTH TO ACCESS...

DRAM, MEMORY CONTROLLER AND ASSOCIATED TRAINING METHOD

DELAY TRACKING METHOD AND MEMORY SYSTEM

DELAY TRACKING METHOD AND MEMORY SYSTEM

Method of Parity Training for a DRAM Supporting a Link Error Checki...

MEMORY SYSTEM AND REFRESH CONTROL METHOD THEREOF

REFRESH CONTROL METHOD FOR MEMORY SYSTEM

MEMORY DEVICE, MEMORY CONTROLLER AND ASSOCIATED MEMORY SYSTEM

DRAM, MEMORY CONTROLLER AND ASSOCIATED TRAINING METHOD

DRAM AND ACCESS AND OPERATING METHOD THEREOF

MEMORY MODULE, MEMORY CONTROLLER AND ASSOCIATED CONTROL METHOD FOR...

TERMINATION TOPOLOGY OF MEMORY SYSTEM AND ASSOCIATED MEMORY MODULE...

MEMORY INTERFACE CIRCUIT HAVING SIGNAL DETECTOR FOR DETECTING CLOCK...

MEMORY INTERFACE CIRCUIT CAPABLE OF CONTROLLING DRIVING ABILITY AND...

METHOD FOR PERFORMING SIGNAL CONTROL OF AN ELECTRONIC DEVICE, AND A...

MEMORY CAPABLE OF ENTERING/EXITING POWER DOWN STATE DURING SELF-REF...

METHOD FOR PERFORMING MEMORY INTERFACE CONTROL OF AN ELECTRONIC DEV...

METHOD FOR PERFORMING MEMORY INTERFACE CALIBRATION IN AN ELECTRONIC...

MEMORY CONTROLLER, MEMORY MODULE AND MEMORY SYSTEM

TERMINATION CIRCUIT AND DC BALANCE METHOD THEREOF

Method for detecting data strobe signal

Method for detecting data strobe signal

Method of memory space configuration

Method for detecting data strobe signal