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Boon Jin Ang
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Butterworth, MY
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Patents Grants
last 30 patents
Information
Patent Grant
Integrated circuit with dynamically-adjustable buffer space for ser...
Patent number
10,339,074
Issue date
Jul 2, 2019
Altera Corporation
Zun Yang Tan
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Integrated circuit with dynamically-adjustable buffer space for ser...
Patent number
9,680,773
Issue date
Jun 13, 2017
Altera Corporation
Zun Yang Tan
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
High speed IO buffer
Patent number
9,166,591
Issue date
Oct 20, 2015
Altera Corporation
Foong Tek Chan
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Integrated circuit system with dynamic decoupling and method of man...
Patent number
9,153,572
Issue date
Oct 6, 2015
Altera Corporation
Kyung Suk Oh
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Method and apparatus for determining clock uncertainties
Patent number
8,739,099
Issue date
May 27, 2014
Altera Corporation
Victor R. Maruri
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Memory circuitry with dynamic power control
Patent number
8,699,291
Issue date
Apr 15, 2014
Altera Corporation
Chin Ghee Ch'ng
G11 - INFORMATION STORAGE
Information
Patent Grant
Predicting routability of integrated circuits
Patent number
8,694,944
Issue date
Apr 8, 2014
Altera Corporation
Sze Huey Soo
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Integrated circuit with configurable I/O transistor arrangement
Patent number
8,686,758
Issue date
Apr 1, 2014
Altera Corporation
Ket Chiew Sia
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Frequency control clock tuning circuitry
Patent number
8,659,334
Issue date
Feb 25, 2014
Altera Corporation
Teik Wah Lim
G11 - INFORMATION STORAGE
Information
Patent Grant
Memory error detection circuitry
Patent number
8,612,814
Issue date
Dec 17, 2013
Altera Corporation
Jun Pin Tan
G11 - INFORMATION STORAGE
Information
Patent Grant
Multiplier with built-in accumulator
Patent number
8,533,250
Issue date
Sep 10, 2013
Altera Corporation
Kok Yoong Foo
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Configurable memory block
Patent number
8,400,863
Issue date
Mar 19, 2013
Altera Corporation
Zun Yang Tan
G11 - INFORMATION STORAGE
Information
Patent Grant
Frequency control clock tuning circuitry
Patent number
8,232,823
Issue date
Jul 31, 2012
Altera Corporation
Teik Wah Lim
G11 - INFORMATION STORAGE
Information
Patent Grant
Data encoding scheme to reduce sense current
Patent number
8,189,362
Issue date
May 29, 2012
Altera Corporation
Jun Pin Tan
G11 - INFORMATION STORAGE
Information
Patent Grant
Method of designing integrated circuits including providing an opti...
Patent number
8,151,224
Issue date
Apr 3, 2012
Altera Corporation
Boon Jin Ang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Techniques for performing built-in self-test of receiver channel ha...
Patent number
8,037,377
Issue date
Oct 11, 2011
Altera Corporation
Ie Chen Chia
G01 - MEASURING TESTING
Information
Patent Grant
Programmable control of mask-programmable integrated circuit devices
Patent number
8,037,444
Issue date
Oct 11, 2011
Altera Corporation
Boon Jin Ang
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Data encoding scheme to reduce sense current
Patent number
7,978,493
Issue date
Jul 12, 2011
Altera Corporation
Jun Pin Tan
G11 - INFORMATION STORAGE
Information
Patent Grant
Techniques for optimizing design of a hard intellectual property bl...
Patent number
7,843,216
Issue date
Nov 30, 2010
Altera Corporation
Darren van Wageningen
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Dynamic real-time delay characterization and configuration
Patent number
7,787,314
Issue date
Aug 31, 2010
Altera Corporation
Jun Pin Tan
G11 - INFORMATION STORAGE
Information
Patent Grant
Delay circuit with delay cells in different orientations
Patent number
7,683,689
Issue date
Mar 23, 2010
Altera Corporation
Tat Mun Lui
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Techniques for reducing clock skew in clock routing networks
Patent number
7,639,047
Issue date
Dec 29, 2009
Altera Corporation
Boon Jin Ang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Circuitry for facilitating performance of multiply-accumulate opera...
Patent number
7,565,390
Issue date
Jul 21, 2009
Altera Corporation
Tat Mun Lui
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Techniques for debugging hard intellectual property blocks
Patent number
7,479,803
Issue date
Jan 20, 2009
Altera Corporation
Darren van Wageningen
G01 - MEASURING TESTING
Information
Patent Grant
Techniques for optimizing design of a hard intellectual property bl...
Patent number
7,434,192
Issue date
Oct 7, 2008
Altera Corporation
Darren van Wageningen
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Method for transferring data across different clock domains with se...
Patent number
7,363,526
Issue date
Apr 22, 2008
Altera Corporation
Thow Pang Chong
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Programmable soft macro memory using gate array base cells
Patent number
7,305,640
Issue date
Dec 4, 2007
Altera Corporation
Hee Kong Phoon
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
LVDS output buffer pre-emphasis methods and apparatus
Patent number
7,265,587
Issue date
Sep 4, 2007
Altera Corporation
Bee Yee Ng
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Techniques for combining volatile and non-volatile programmable log...
Patent number
7,242,218
Issue date
Jul 10, 2007
Altera Corporation
Rafael Camarota
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Signal propagation circuitry for use on integrated circuits
Patent number
7,233,189
Issue date
Jun 19, 2007
Altera Corporation
Boon Jin Ang
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
FREQUENCY CONTROL CLOCK TUNING CIRCUITRY
Publication number
20120274375
Publication date
Nov 1, 2012
Teik Wah Lim
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
DATA ENCODING SCHEME TO REDUCE SENSE CURRENT
Publication number
20110292711
Publication date
Dec 1, 2011
Jun Pin Tan
G11 - INFORMATION STORAGE
Information
Patent Application
DYNAMIC REAL-TIME DELAY CHARACTERIZATION AND CONFIGURATION
Publication number
20100061166
Publication date
Mar 11, 2010
Altera Corporation
Jun Pin Tan
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
TECHNIQUES FOR OPTIMIZING DESIGN OF A HARD INTELLECTUAL PROPERTY BL...
Publication number
20080297192
Publication date
Dec 4, 2008
Altera Corporation
Darren van Wageningen
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Application
Techniques for optimizing design of a hard intellectual property bl...
Publication number
20060125517
Publication date
Jun 15, 2006
Altera Corporation
Darren van Wageningen
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Application
Techniques for implementing hardwired decoders in differential inpu...
Publication number
20060119386
Publication date
Jun 8, 2006
Altera Corporation
Bee Yee Ng
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
Techniques for combining volatile and non-volatile programmable log...
Publication number
20060119384
Publication date
Jun 8, 2006
Altera Corporation
Rafael Camarota
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Mask-programmable logic device with building block architecture
Publication number
20040111691
Publication date
Jun 10, 2004
Kim Pin Tan
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
PROGRAMMABLE LOGIC CONFIGURATION DEVICE WITH CONFIGURATION MEMORY A...
Publication number
20030122577
Publication date
Jul 3, 2003
Kerry S. Veenstra
G06 - COMPUTING CALCULATING COUNTING