Bor-Doou Rong

Person

Chupei, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Dynamic memory with sustainable storage architecture and clean up c...
- Patent number 12,068,020
- Issue date Aug 20, 2024
- Etron Technology, Inc.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic memory with long retention time
- Patent number 11,798,613
- Issue date Oct 24, 2023
- Etron Technology, Inc.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic memory with sustainable storage architecture
- Patent number 11,302,383
- Issue date Apr 12, 2022
- Etron Technology, Inc.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
System-in-package module and manufacture method for a system-in-pac...
- Patent number 9,601,456
- Issue date Mar 21, 2017
- Etron Technology, Inc.
- Bor-Doou Rong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bundled memory and manufacture method for a bundled memory with an...
- Patent number 9,589,931
- Issue date Mar 7, 2017
- Etron Technology, Inc.
- Bor-Doou Rong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory with variable operation voltage and the adjusting method the...
- Patent number 9,465,430
- Issue date Oct 11, 2016
- Industrial Technology Research Institute
- Chun Shiah
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Bundled memory and manufacture method for a bundled memory with an...
- Patent number 9,214,448
- Issue date Dec 15, 2015
- Etron Technology, Inc.
- Bor-Doou Rong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bundled memory and manufacture method for a bundled memory with an...
- Patent number 9,070,558
- Issue date Jun 30, 2015
- Etron Technology, Inc.
- Bor-Doou Rong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Data detecting apparatus and methods thereof
- Patent number 7,983,102
- Issue date Jul 19, 2011
- Etron Technology, Inc.
- Shih-Hsing Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic input setup/hold time improvement architecture
- Patent number 7,515,669
- Issue date Apr 7, 2009
- Etron Technology, Inc.
- Chun Shiah
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Time controllable sensing scheme for sense amplifier in memory IC test
- Patent number 7,478,294
- Issue date Jan 13, 2009
- Etron Technology, Inc.
- Bor-Doou Rong
- G11 - INFORMATION STORAGE
Information Patent Grant
Calibrated built-in temperature sensor and calibration method thereof
- Patent number 7,434,985
- Issue date Oct 14, 2008
- Etron Technology, Inc.
- Jen-Shou Hsu
- G01 - MEASURING TESTING
Information Patent Grant
Internal power management scheme for a memory chip in deep power do...
- Patent number 7,292,494
- Issue date Nov 6, 2007
- Etron Technology Inc.
- Jen-Shou Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power design for fuse control circuit
- Patent number 7,098,722
- Issue date Aug 29, 2006
- Etron Technology, Inc.
- Jeng-Tzong Shih
- G11 - INFORMATION STORAGE
Information Patent Grant
Internal power management scheme for a memory chip in deep power do...
- Patent number 7,031,219
- Issue date Apr 18, 2006
- Etron Technology, Inc.
- Jen-Shoe Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable self-time scheme for write recovery by low speed tester
- Patent number 6,934,899
- Issue date Aug 23, 2005
- Etron Technology, Inc.
- Der-Min Yuan
- G11 - INFORMATION STORAGE
Information Patent Grant
Wafer level burn-in for memory integrated circuit
- Patent number 6,661,719
- Issue date Dec 9, 2003
- ExronTechnology, Inc.
- Jeng-Tzong Shih
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power SRAM redundancy repair scheme
- Patent number 6,643,166
- Issue date Nov 4, 2003
- Etron Technology, Inc.
- Tah-Kang Joseph Ting
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory architecture for read and write at the same time using a con...
- Patent number 6,377,492
- Issue date Apr 23, 2002
- Etron Technologies, Inc.
- Bor-Doou Rong
- G11 - INFORMATION STORAGE
Information Patent Grant
Design for testability in very high speed memory
- Patent number 6,237,115
- Issue date May 22, 2001
- Etron Technology, Inc.
- Tah-Kang Joseph Ting
- G11 - INFORMATION STORAGE
Information Patent Grant
Area efficient global row redundancy scheme for DRAM
- Patent number 6,101,138
- Issue date Aug 8, 2000
- Eton Technology, Inc.
- Chun Shiah
- G11 - INFORMATION STORAGE
Information Patent Grant
Protection circuit to ensure DRAM signal in write cycle
- Patent number 6,058,069
- Issue date May 2, 2000
- Etron Technology, Inc.
- Tah Kang Joseph Ting
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory arrays
- Patent number 5,737,271
- Issue date Apr 7, 1998
- Etron Technology, Inc.
- Tah-Kang Joseph Ting
- G11 - INFORMATION STORAGE
Information Patent Grant
Level boost restoration circuit
- Patent number 5,723,994
- Issue date Mar 3, 1998
- Etron Technology, Inc.
- Tah-Kang Joseph Ting
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
t.sub.RAS protection circuit
- Patent number 5,703,832
- Issue date Dec 30, 1997
- Etron Technology, Inc.
- Tah-Kang Joseph Ting
- G11 - INFORMATION STORAGE
Information Patent Grant
Low standby power redundancy circuit
- Patent number 5,671,189
- Issue date Sep 23, 1997
- Etron Technology, Inc.
- Tah-Kang Joseph Ting
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DYNAMIC MEMORY WITH LONG RETENTION TIME
- Publication number 20230420028
- Publication date Dec 28, 2023
- ETRON TECHNOLOGY, INC.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE AND CLEAN UP C...
- Publication number 20220246192
- Publication date Aug 4, 2022
- ETRON TECHNOLOGY, INC.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE
- Publication number 20220246199
- Publication date Aug 4, 2022
- ETRON TECHNOLOGY, INC.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Application
SUSTAINABLE DRAM HAVING PRINCIPLE POWER SUPPLY VOLTAGE UNIFIED WITH...
- Publication number 20210295893
- Publication date Sep 23, 2021
- ETRON TECHNOLOGY, INC.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC MEMORY WITH LONG RETENTION TIME
- Publication number 20210225434
- Publication date Jul 22, 2021
- ETRON TECHNOLOGY, INC.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE
- Publication number 20200185022
- Publication date Jun 11, 2020
- ETRON TECHNOLOGY, INC.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Application
BUNDLED MEMORY AND MANUFACTURE METHOD FOR A BUNDLED MEMORY WITH AN...
- Publication number 20150228620
- Publication date Aug 13, 2015
- ETRON TECHNOLOGY, INC.
- Bor-Doou Rong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM-IN-PACKAGE MODULE AND MANUFACTURE METHOD FOR A SYSTEM-IN-PAC...
- Publication number 20150206849
- Publication date Jul 23, 2015
- ETRON TECHNOLOGY, INC.
- Bor-Doou Rong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY WITH VARIABLE OPERATION VOLTAGE AND THE ADJUSTING METHOD THE...
- Publication number 20140351609
- Publication date Nov 27, 2014
- Industrial Technology Research Institute
- Chun SHIAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUNDLED MEMORY AND MANUFACTURE METHOD FOR A BUNDLED MEMORY WITH AN...
- Publication number 20140308809
- Publication date Oct 16, 2014
- Bor-Doou Rong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BUNDLED MEMORY AND MANUFACTURE METHOD FOR A BUNDLED MEMORY WITH AN...
- Publication number 20130248860
- Publication date Sep 26, 2013
- ETRON TECHNOLOGY, INC.
- Bor-Doou Rong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DATA DETECTING APPARATUS AND METHODS THEREOF
- Publication number 20100103753
- Publication date Apr 29, 2010
- Shih-Hsing WANG
- G11 - INFORMATION STORAGE
Information Patent Application
Re-routing method and the circuit thereof
- Publication number 20080202800
- Publication date Aug 28, 2008
- Ming-Hong Kuo
- G01 - MEASURING TESTING
Information Patent Application
Calibrated built-in temperature sensor and calibration method thereof
- Publication number 20070140308
- Publication date Jun 21, 2007
- Etron Technology, Inc.
- Jen-Shou Hsu
- G01 - MEASURING TESTING
Information Patent Application
Dynamic input setup/hold time improvement architecture
- Publication number 20070058765
- Publication date Mar 15, 2007
- Etron Technology, Inc.
- Chun Shiah
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Time controllable sensing scheme for sense amplifier in memory IC test
- Publication number 20070011508
- Publication date Jan 11, 2007
- Etron Technology, Inc.
- Bor-Doou Rong
- G11 - INFORMATION STORAGE
Information Patent Application
Re-routing method and the circuit thereof
- Publication number 20060284635
- Publication date Dec 21, 2006
- Ming-Hong Kuo
- G01 - MEASURING TESTING
Information Patent Application
Internal power management scheme for a memory chip in deep power do...
- Publication number 20060146636
- Publication date Jul 6, 2006
- Jen-Shou Hsu
- G11 - INFORMATION STORAGE
Information Patent Application
Test pads for IC chip
- Publication number 20060028228
- Publication date Feb 9, 2006
- Bor-Doou Rong
- G01 - MEASURING TESTING
Information Patent Application
Low power design for fuse control circuit
- Publication number 20060012418
- Publication date Jan 19, 2006
- Etron Technology, Inc.
- Jeng-Tzong Shih
- G11 - INFORMATION STORAGE
Information Patent Application
Internal power management scheme for a memory chip in deep power do...
- Publication number 20050270880
- Publication date Dec 8, 2005
- Etron Technology, Inc.
- Jen-Shoe Hsu
- G11 - INFORMATION STORAGE
Information Patent Application
Variable self-time scheme for write recovery by low speed tester
- Publication number 20030145260
- Publication date Jul 31, 2003
- Etron Technology, Inc.
- Der-Min Yuan
- G11 - INFORMATION STORAGE

Bor-Doou Rong

Person

Patents Grantslast 30 patents

Dynamic memory with sustainable storage architecture and clean up c...

Dynamic memory with long retention time

Dynamic memory with sustainable storage architecture

System-in-package module and manufacture method for a system-in-pac...

Bundled memory and manufacture method for a bundled memory with an...

Memory with variable operation voltage and the adjusting method the...

Bundled memory and manufacture method for a bundled memory with an...

Bundled memory and manufacture method for a bundled memory with an...

Data detecting apparatus and methods thereof

Dynamic input setup/hold time improvement architecture

Time controllable sensing scheme for sense amplifier in memory IC test

Calibrated built-in temperature sensor and calibration method thereof

Internal power management scheme for a memory chip in deep power do...

Low power design for fuse control circuit

Internal power management scheme for a memory chip in deep power do...

Variable self-time scheme for write recovery by low speed tester

Wafer level burn-in for memory integrated circuit

Low power SRAM redundancy repair scheme

Memory architecture for read and write at the same time using a con...

Design for testability in very high speed memory

Area efficient global row redundancy scheme for DRAM

Protection circuit to ensure DRAM signal in write cycle

Semiconductor memory arrays

Level boost restoration circuit

t.sub.RAS protection circuit

Low standby power redundancy circuit

Patents Applicationslast 30 patents

DYNAMIC MEMORY WITH LONG RETENTION TIME

DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE AND CLEAN UP C...

DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE

SUSTAINABLE DRAM HAVING PRINCIPLE POWER SUPPLY VOLTAGE UNIFIED WITH...

DYNAMIC MEMORY WITH LONG RETENTION TIME

DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE

BUNDLED MEMORY AND MANUFACTURE METHOD FOR A BUNDLED MEMORY WITH AN...

SYSTEM-IN-PACKAGE MODULE AND MANUFACTURE METHOD FOR A SYSTEM-IN-PAC...

MEMORY WITH VARIABLE OPERATION VOLTAGE AND THE ADJUSTING METHOD THE...

BUNDLED MEMORY AND MANUFACTURE METHOD FOR A BUNDLED MEMORY WITH AN...

BUNDLED MEMORY AND MANUFACTURE METHOD FOR A BUNDLED MEMORY WITH AN...

DATA DETECTING APPARATUS AND METHODS THEREOF

Re-routing method and the circuit thereof

Calibrated built-in temperature sensor and calibration method thereof

Dynamic input setup/hold time improvement architecture

Time controllable sensing scheme for sense amplifier in memory IC test

Re-routing method and the circuit thereof

Internal power management scheme for a memory chip in deep power do...

Test pads for IC chip

Low power design for fuse control circuit

Internal power management scheme for a memory chip in deep power do...

Variable self-time scheme for write recovery by low speed tester