Boris A. Babayan

Person

Moscow, RU

People

Patents Grantslast 30 patents

Information Patent Grant
Instructions for manipulating a multi-bit predicate register for pr...
- Patent number 10,579,378
- Issue date Mar 3, 2020
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for sorting and retiring stores
- Patent number 10,514,927
- Issue date Dec 24, 2019
- Intel Corporation
- Anton Lechanka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to do control speculation on loads in a high performance str...
- Patent number 10,241,789
- Issue date Mar 26, 2019
- Intel Corporation
- Alexander Y. Ostanevich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods to support counted loop exits in a multi-stra...
- Patent number 10,241,794
- Issue date Mar 26, 2019
- Intel Corporation
- Sergey P. Scherbinin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to create register windows for parallel iterat...
- Patent number 10,241,801
- Issue date Mar 26, 2019
- Intel Corporation
- Jayesh Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to efficiently handle allocation of memory ord...
- Patent number 10,235,171
- Issue date Mar 19, 2019
- Intel Corporation
- Alexander Y. Ostanevich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for identifying instructions for retirement i...
- Patent number 10,133,582
- Issue date Nov 20, 2018
- Intel Corporation
- Nikolay Kosarev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware apparatuses and methods to control access to a multiple ba...
- Patent number 10,095,623
- Issue date Oct 9, 2018
- Intel Corporation
- Andrey Kluchnikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reconstructing real program order of instr...
- Patent number 9,811,340
- Issue date Nov 7, 2017
- Intel Corporation
- Nikolay Kosarev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing area and complexity of instructio...
- Patent number 9,645,819
- Issue date May 9, 2017
- Intel Corporation
- Jayesh Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for scheduling instructions in a multi-strand...
- Patent number 9,529,596
- Issue date Dec 27, 2016
- Intel Corporation
- Boris A. Babayan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware apparatuses and methods to control access to a multiple ba...
- Patent number 9,471,501
- Issue date Oct 18, 2016
- Intel Corporation
- Andrey Kluchnikov
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHODS TO SUPPORT COUNTED LOOP EXITS IN A MULTI-STRA...
- Publication number 20180181400
- Publication date Jun 28, 2018
- Sergey P. Scherbinin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO CREATE REGISTER WINDOWS FOR PARALLEL ITERAT...
- Publication number 20180181405
- Publication date Jun 28, 2018
- Intel Corporation
- Jayesh IYER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO DO CONTROL SPECULATION ON LOADS IN A HIGH PERFORMANCE STR...
- Publication number 20180181396
- Publication date Jun 28, 2018
- Intel Corporation
- Alexander Y. OSTANEVICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS OF DECOMPOSING LOOPS TO IMPROVE PERFORMANCE A...
- Publication number 20180181398
- Publication date Jun 28, 2018
- Intel Corporation
- Sergey P. Scherbinin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO EFFICIENTLY HANDLE ALLOCATION OF MEMORY ORD...
- Publication number 20180181397
- Publication date Jun 28, 2018
- Intel Corporation
- Alexander Y. OSTANEVICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Scheduling of Instructions in a Multi-Stra...
- Publication number 20170235578
- Publication date Aug 17, 2017
- Intel Corporation
- Boris A. Babayan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-ASSISTED SOFTWARE VERIFICATION AND SECURE EXECUTION
- Publication number 20170090929
- Publication date Mar 30, 2017
- McAfee, Inc.
- Igor Muttik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE APPARATUSES AND METHODS TO CONTROL ACCESS TO A MULTIPLE BA...
- Publication number 20170039139
- Publication date Feb 9, 2017
- Intel Corporation
- Andrey Kluchnikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR LOGIC AND METHOD FOR DISPATCHING INSTRUCTIONS FROM MULTIP...
- Publication number 20160364237
- Publication date Dec 15, 2016
- Intel Corporation
- Nikolay Kosarev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and Logic for Sorting and Retiring Stores
- Publication number 20160364239
- Publication date Dec 15, 2016
- Intel Corporation
- Anton Lechenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR IDENTIFYING INSTRUCTIONS FOR RETIREMENT I...
- Publication number 20160314000
- Publication date Oct 27, 2016
- Intel Corporation
- Nikolay Kosarev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR MEMORY ACCESS IN A CLUSTERED WIDE-EXECUTI...
- Publication number 20160306742
- Publication date Oct 20, 2016
- Intel Corporation
- Anton W. LECHENKO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE APPARATUSES AND METHODS TO CONTROL ACCESS TO A MULTIPLE BA...
- Publication number 20160092367
- Publication date Mar 31, 2016
- Intel Corporation
- Andrey Kluchnikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR EXECUTING INSTRUCTIONS USING A PREDICATE R...
- Publication number 20150277910
- Publication date Oct 1, 2015
- Intel Corporation
- EDWARD T. GROCHOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SCHEDULING FOR A MULTI-STRAND OUT-OF-ORDER PROCESSOR
- Publication number 20140208074
- Publication date Jul 24, 2014
- Boris A. Babayan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR REDUCING AREA AND COMPLEXITY OF INSTRUCTIO...
- Publication number 20130339679
- Publication date Dec 19, 2013
- Intel Corporation
- Jayesh IYER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR RECONSTRUCTING REAL PROGRAM ORDER OF INSTR...
- Publication number 20130339711
- Publication date Dec 19, 2013
- Intel Corporation
- Nikolay KOSAREV
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SCHEDULING OF INSTRUCTIONS IN A MULTI-STRA...
- Publication number 20130007415
- Publication date Jan 3, 2013
- Boris A. Babayan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATIC CODE RECOGNITION FOR BINARY TRANSLATION
- Publication number 20110107314
- Publication date May 5, 2011
- Boris Artashesovich Babayan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR PARALLEL COMPUTING
- Publication number 20100274972
- Publication date Oct 28, 2010
- Boris Babayan
- G06 - COMPUTING CALCULATING COUNTING

Boris A. Babayan

Person

Patents Grantslast 30 patents

Instructions for manipulating a multi-bit predicate register for pr...

Instruction and logic for sorting and retiring stores

Method to do control speculation on loads in a high performance str...

Apparatus and methods to support counted loop exits in a multi-stra...

Method and apparatus to create register windows for parallel iterat...

Method and apparatus to efficiently handle allocation of memory ord...

Instruction and logic for identifying instructions for retirement i...

Hardware apparatuses and methods to control access to a multiple ba...

Method and apparatus for reconstructing real program order of instr...

Method and apparatus for reducing area and complexity of instructio...

Method and apparatus for scheduling instructions in a multi-strand...

Hardware apparatuses and methods to control access to a multiple ba...

Patents Applicationslast 30 patents

APPARATUS AND METHODS TO SUPPORT COUNTED LOOP EXITS IN A MULTI-STRA...

METHOD AND APPARATUS TO CREATE REGISTER WINDOWS FOR PARALLEL ITERAT...

METHOD TO DO CONTROL SPECULATION ON LOADS IN A HIGH PERFORMANCE STR...

APPARATUS AND METHODS OF DECOMPOSING LOOPS TO IMPROVE PERFORMANCE A...

METHOD AND APPARATUS TO EFFICIENTLY HANDLE ALLOCATION OF MEMORY ORD...

Method and Apparatus for Scheduling of Instructions in a Multi-Stra...

HARDWARE-ASSISTED SOFTWARE VERIFICATION AND SECURE EXECUTION

HARDWARE APPARATUSES AND METHODS TO CONTROL ACCESS TO A MULTIPLE BA...

PROCESSOR LOGIC AND METHOD FOR DISPATCHING INSTRUCTIONS FROM MULTIP...

Instruction and Logic for Sorting and Retiring Stores

INSTRUCTION AND LOGIC FOR IDENTIFYING INSTRUCTIONS FOR RETIREMENT I...

INSTRUCTION AND LOGIC FOR MEMORY ACCESS IN A CLUSTERED WIDE-EXECUTI...

HARDWARE APPARATUSES AND METHODS TO CONTROL ACCESS TO A MULTIPLE BA...

METHOD AND APPARATUS FOR EXECUTING INSTRUCTIONS USING A PREDICATE R...

INSTRUCTION SCHEDULING FOR A MULTI-STRAND OUT-OF-ORDER PROCESSOR

METHOD AND APPARATUS FOR REDUCING AREA AND COMPLEXITY OF INSTRUCTIO...

METHOD AND APPARATUS FOR RECONSTRUCTING REAL PROGRAM ORDER OF INSTR...

METHOD AND APPARATUS FOR SCHEDULING OF INSTRUCTIONS IN A MULTI-STRA...

STATIC CODE RECOGNITION FOR BINARY TRANSLATION

SYSTEMS, METHODS, AND APPARATUSES FOR PARALLEL COMPUTING