Boris Habets

Person

Dreseden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Process control method for lithographically processed semiconductor...
- Patent number 10,739,685
- Issue date Aug 11, 2020
- Qoniac GmbH
- Stefan Buhl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for fabricating wafer by calculating process c...
- Patent number 10,739,688
- Issue date Aug 11, 2020
- Qoniac GmbH
- Boris Habets
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method for processing of a further layer on a semiconductor wafer
- Patent number 10,699,971
- Issue date Jun 30, 2020
- Qoniac GmbH
- Boris Habets
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus for simulation of lithography overlay
- Patent number 10,379,447
- Issue date Aug 13, 2019
- Qoniac GmbH
- Boris Habets
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus of evaluating a semiconductor manufacturing pr...
- Patent number 10,310,490
- Issue date Jun 4, 2019
- Qoniac GmbH
- Stefan Buhl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for fabricating wafer by calculating process c...
- Patent number 10,295,914
- Issue date May 21, 2019
- Qoniac GmbH
- Boris Habets
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of manufacturing semiconductor devices by using sampling plans
- Patent number 10,234,401
- Issue date Mar 19, 2019
- QONIAC GMBH
- Stefan Buhl
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method for assessing the usability of an exposed and developed semi...
- Patent number 10,008,422
- Issue date Jun 26, 2018
- Qoniac GmbH
- Boris Habets
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for fabricating wafer by calculating process c...
- Patent number 9,543,223
- Issue date Jan 10, 2017
- Qoniac GmbH
- Boris Habets
- G05 - CONTROLLING REGULATING
Information Patent Grant
Alignment calculation
- Patent number 8,440,475
- Issue date May 14, 2013
- Qimonda AG
- Boris Habets
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Systems and methods of alternative overlay calculation
- Patent number 7,783,444
- Issue date Aug 24, 2010
- Qimonda AG
- Boris Habets
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR SIMULATION OF LITHOGRAPHY OVERLAY
- Publication number 20190361354
- Publication date Nov 28, 2019
- Qoniac GmbH
- Boris Habets
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Process Control Method For Lithographically Processed Semiconductor...
- Publication number 20190250516
- Publication date Aug 15, 2019
- Qoniac GmbH
- Stefan Buhl
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method and Apparatus for Fabricating Wafer By Calculating Process C...
- Publication number 20190243255
- Publication date Aug 8, 2019
- Quoniac GmbH
- Boris Habets
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR ASSESSING THE USABILITY OF AN EXPOSED AND DEVELOPED SEMI...
- Publication number 20180342429
- Publication date Nov 29, 2018
- Qoniac GmbH
- Boris Habets
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES BY USING SAMPLING PLANS
- Publication number 20170242425
- Publication date Aug 24, 2017
- Qoniac GmbH
- Stefan Buhl
- G05 - CONTROLLING REGULATING
Information Patent Application
Method and Apparatus of Evaluating a Semiconductor Manufacturing Pr...
- Publication number 20170221741
- Publication date Aug 3, 2017
- Qoniac GmbH
- Stefan Buhl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Apparatus for Fabricating Wafer By Calculating Process C...
- Publication number 20170075230
- Publication date Mar 16, 2017
- Boris Habets
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Method And Apparatus For Analysis Of Processing Of A Semiconductor...
- Publication number 20170053842
- Publication date Feb 23, 2017
- Qoniac GmbH
- Martin Roessiger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Apparatus for Simulation of Lithography Overlay
- Publication number 20150019192
- Publication date Jan 15, 2015
- Boris Habets
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR FABRICATING WAFER BY CALCULATING PROCESS C...
- Publication number 20140212817
- Publication date Jul 31, 2014
- Boris Habets
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Alignment Calculation
- Publication number 20100030360
- Publication date Feb 4, 2010
- Boris Habets
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Systems and Methods of Alternative Overlay Calculation
- Publication number 20090248337
- Publication date Oct 1, 2009
- Boris Habets
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and system for determining deformations on a substrate
- Publication number 20080182344
- Publication date Jul 31, 2008
- Steffen Mueller
- G01 - MEASURING TESTING

Boris Habets

Person

Patents Grantslast 30 patents

Process control method for lithographically processed semiconductor...

Method and apparatus for fabricating wafer by calculating process c...

Method for processing of a further layer on a semiconductor wafer

Method and apparatus for simulation of lithography overlay

Method and apparatus of evaluating a semiconductor manufacturing pr...

Method and apparatus for fabricating wafer by calculating process c...

Method of manufacturing semiconductor devices by using sampling plans

Method for assessing the usability of an exposed and developed semi...

Method and apparatus for fabricating wafer by calculating process c...

Alignment calculation

Systems and methods of alternative overlay calculation

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR SIMULATION OF LITHOGRAPHY OVERLAY

Process Control Method For Lithographically Processed Semiconductor...

Method and Apparatus for Fabricating Wafer By Calculating Process C...

METHOD FOR ASSESSING THE USABILITY OF AN EXPOSED AND DEVELOPED SEMI...

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES BY USING SAMPLING PLANS

Method and Apparatus of Evaluating a Semiconductor Manufacturing Pr...

Method and Apparatus for Fabricating Wafer By Calculating Process C...

Method And Apparatus For Analysis Of Processing Of A Semiconductor...

Method and Apparatus for Simulation of Lithography Overlay

METHOD AND APPARATUS FOR FABRICATING WAFER BY CALCULATING PROCESS C...

Alignment Calculation

Systems and Methods of Alternative Overlay Calculation

Method and system for determining deformations on a substrate