Bosco Lan

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Fremont, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Electroplating and electroless plating of conductive materials into...
- Patent number 7,521,360
- Issue date Apr 21, 2009
- Tru-Si Technologies, Inc.
- Patrick A. Halahan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electroplating and electroless plating of conductive materials into...
- Patent number 6,897,148
- Issue date May 24, 2005
- Tru-Si Technologies, Inc.
- Patrick A. Halahan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical structure for semiconductor wafer-level chip scale packages
- Patent number 6,392,290
- Issue date May 21, 2002
- Siliconix Incorporated
- Y. Mohammed Kasem
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of high-density trench DMOS using sidewall spacers
- Patent number 5,904,525
- Issue date May 18, 1999
- Siliconix Incorporated
- Fwu-Iuan Hshieh
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ELECTROPLATING AND ELECTROLESS PLATING OF CONDUCTIVE MATERIALS INTO...
- Publication number 20070128868
- Publication date Jun 7, 2007
- Patrick A. Halahan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electroplating and electroless plating of conductive materials into...
- Publication number 20050170647
- Publication date Aug 4, 2005
- Patrick A. Halahan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electroplating and electroless plating of conductive materials into...
- Publication number 20040203224
- Publication date Oct 14, 2004
- Patrick A. Halahan
- H01 - BASIC ELECTRIC ELEMENTS