Bradley Smith

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Electronic device including a capacitor and a process of forming th...
- Patent number 9,064,785
- Issue date Jun 23, 2015
- Freesacle Semiconductor, Inc.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for recovering from transistor aging using heating
- Patent number 9,000,507
- Issue date Apr 7, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- G05 - CONTROLLING REGULATING
Information Patent Grant
Patterning a gate stack of a non-volatile memory (NVM) with formati...
- Patent number 8,426,263
- Issue date Apr 23, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patterning a gate stack of a non-volatile memory (NVM) with formati...
- Patent number 8,420,480
- Issue date Apr 16, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patterning a gate stack of a non-volatile memory (NVM) with formati...
- Patent number 8,415,217
- Issue date Apr 9, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through-via and method of forming
- Patent number 7,985,655
- Issue date Jul 26, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through-via and method of forming
- Patent number 7,923,369
- Issue date Apr 12, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device test system having reduced current leakage
- Patent number 7,589,550
- Issue date Sep 15, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device for reducing photovolatic current
- Patent number 7,238,579
- Issue date Jul 3, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device for reducing photovolatic current
- Patent number 6,956,281
- Issue date Oct 18, 2005
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective sizing of features to compensate for resist thickness var...
- Patent number 6,489,083
- Issue date Dec 3, 2002
- Motorola, Inc.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device, a process for a semiconductor device, and a p...
- Patent number 6,459,156
- Issue date Oct 1, 2002
- Motorola, Inc.
- Edward O. Travis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor device barrier layer
- Patent number 6,451,181
- Issue date Sep 17, 2002
- Motorola, Inc.
- Dean J. Denning
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for forming a dual inlaid copper interconnect structure
- Patent number 6,326,301
- Issue date Dec 4, 2001
- Motorola, Inc.
- Suresh Venkatesan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having a dummy structure and method of making
- Patent number 5,885,856
- Issue date Mar 23, 1999
- Motorola, Inc.
- Percy V. Gilbert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SRAM with programmable preset data
- Patent number 5,440,513
- Issue date Aug 8, 1995
- Motorola Inc.
- Bradley P. Smith
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for forming field isolation
- Patent number 5,374,585
- Issue date Dec 20, 1994
- Motorola, Inc.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR RECOVERING FROM TRANSISTOR AGING USING HEATING
- Publication number 20150002211
- Publication date Jan 1, 2015
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATI...
- Publication number 20120252177
- Publication date Oct 4, 2012
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATI...
- Publication number 20120252178
- Publication date Oct 4, 2012
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATI...
- Publication number 20120252179
- Publication date Oct 4, 2012
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-VIA AND METHOD OF FORMING
- Publication number 20100129981
- Publication date May 27, 2010
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-VIA AND METHOD OF FORMING
- Publication number 20100130008
- Publication date May 27, 2010
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE TEST SYSTEM HAVING REDUCED CURRENT LEAKAGE
- Publication number 20090066359
- Publication date Mar 12, 2009
- Bradley P. Smith
- G01 - MEASURING TESTING
Information Patent Application
ELECTRONIC DEVICE INCLUDING A CAPACITOR AND A PROCESS OF FORMING TH...
- Publication number 20090020849
- Publication date Jan 22, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
User configured order status updates
- Publication number 20060122894
- Publication date Jun 8, 2006
- Jon McGary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor device for reducing photovolatic current
- Publication number 20050093110
- Publication date May 5, 2005
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device for reducing photovolatic current
- Publication number 20040036150
- Publication date Feb 26, 2004
- Bradley P. Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming a barrier layer for use in a copper interconnect
- Publication number 20020092763
- Publication date Jul 18, 2002
- Dean J. Denning
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Method for forming a dual inlaid copper interconnect structure
- Publication number 20020039836
- Publication date Apr 4, 2002
- Suresh Venkatesan
- H01 - BASIC ELECTRIC ELEMENTS

Bradley Smith

Person

Patents Grantslast 30 patents

Electronic device including a capacitor and a process of forming th...

Method and system for recovering from transistor aging using heating

Patterning a gate stack of a non-volatile memory (NVM) with formati...

Patterning a gate stack of a non-volatile memory (NVM) with formati...

Patterning a gate stack of a non-volatile memory (NVM) with formati...

Through-via and method of forming

Through-via and method of forming

Semiconductor device test system having reduced current leakage

Semiconductor device for reducing photovolatic current

Semiconductor device for reducing photovolatic current

Selective sizing of features to compensate for resist thickness var...

Semiconductor device, a process for a semiconductor device, and a p...

Method of forming a semiconductor device barrier layer

Method for forming a dual inlaid copper interconnect structure

Integrated circuit having a dummy structure and method of making

SRAM with programmable preset data

Process for forming field isolation

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR RECOVERING FROM TRANSISTOR AGING USING HEATING

PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATI...

PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATI...

PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATI...

THROUGH-VIA AND METHOD OF FORMING

THROUGH-VIA AND METHOD OF FORMING

SEMICONDUCTOR DEVICE TEST SYSTEM HAVING REDUCED CURRENT LEAKAGE

ELECTRONIC DEVICE INCLUDING A CAPACITOR AND A PROCESS OF FORMING TH...

User configured order status updates

Semiconductor device for reducing photovolatic current

Semiconductor device for reducing photovolatic current

Method for forming a barrier layer for use in a copper interconnect

Method for forming a dual inlaid copper interconnect structure