Brent Keeth

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory module multiple port buffer techniques
- Patent number 12,300,349
- Issue date May 13, 2025
- Micron Technology, Inc.
- Jasper S. Gibbons
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device interface and method
- Patent number 12,277,056
- Issue date Apr 15, 2025
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device interface and method
- Patent number 12,253,943
- Issue date Mar 18, 2025
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with parallel main and test interfaces
- Patent number 12,243,610
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- James Brian Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffer configurations for communications between memory dies and a...
- Patent number 12,170,127
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device interface and method
- Patent number 12,045,500
- Issue date Jul 23, 2024
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neuromorphic memory device and method
- Patent number 11,989,141
- Issue date May 21, 2024
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory expansion card
- Patent number 11,983,059
- Issue date May 14, 2024
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device protection
- Patent number 11,928,025
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-purpose signaling for a memory system
- Patent number 11,893,245
- Issue date Feb 6, 2024
- Micron Technology, Inc.
- James Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal delivery in stacked device
- Patent number 11,887,969
- Issue date Jan 30, 2024
- Brent Keeth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory with fine grain architectures
- Patent number 11,869,622
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device interface and method
- Patent number 11,868,253
- Issue date Jan 9, 2024
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency offset for frame-based communications
- Patent number 11,797,186
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- James Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Finer grain dynamic random access memory
- Patent number 11,791,317
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Brent Keeth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flexible memory system with a controller and a stack of memory
- Patent number 11,769,534
- Issue date Sep 26, 2023
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Translation system for finer grain memory architectures
- Patent number 11,755,515
- Issue date Sep 12, 2023
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protected regions management of memory
- Patent number 11,734,049
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Channel routing for memory devices
- Patent number 11,658,156
- Issue date May 23, 2023
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Grant
Unauthorized access command logging for memory
- Patent number 11,644,982
- Issue date May 9, 2023
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device interface and method
- Patent number 11,635,910
- Issue date Apr 25, 2023
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wafer-scale memory techniques
- Patent number 11,621,257
- Issue date Apr 4, 2023
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable memory architectures
- Patent number 11,614,875
- Issue date Mar 28, 2023
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stacked semiconductor die assemblies with multiple thermal paths an...
- Patent number 11,594,462
- Issue date Feb 28, 2023
- Micron Technology, Inc.
- Steven K. Groothuis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Frame protocol of memory device
- Patent number 11,580,049
- Issue date Feb 14, 2023
- Micron Technology, Inc.
- James Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module multiple port buffer techniques
- Patent number 11,538,508
- Issue date Dec 27, 2022
- Micron Technology, Inc.
- Jasper S. Gibbons
- G11 - INFORMATION STORAGE
Information Patent Grant
Finer grain dynamic random access memory
- Patent number 11,527,510
- Issue date Dec 13, 2022
- Micron Technology, Inc.
- Brent Keeth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flexible memory system with a controller and a stack of memory
- Patent number 11,450,354
- Issue date Sep 20, 2022
- Micron Technology, Inc.
- Joe M. Jeddeloh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device protection
- Patent number 11,409,601
- Issue date Aug 9, 2022
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-purpose signaling for a memory system
- Patent number 11,392,299
- Issue date Jul 19, 2022
- Micron Technology, Inc.
- James Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY WITH PARALLEL MAIN AND TEST INTERFACES
- Publication number 20250182839
- Publication date Jun 5, 2025
- Micron Technology, Inc.
- James Brian Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
SPARING TECHNIQUES IN STACKED MEMORY ARCHITECTURES
- Publication number 20250149108
- Publication date May 8, 2025
- Micron Technology, Inc.
- Sai Krishna Mylavarapu
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...
- Publication number 20250078884
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
DATA PROTECTION TECHNIQUES IN STACKED MEMORY ARCHITECTURES
- Publication number 20250077353
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE TECHNIQUES FOR STACKED MEMORY ARCHITECTURES
- Publication number 20240404581
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Ameen D. Akel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DATA PATH SIGNAL AMPLIFICATION IN COUPLED SEMICONDUCTOR SYSTEMS
- Publication number 20240355371
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- James Brian Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
TRANSISTOR ARCHITECTURES IN COUPLED SEMICONDUCTOR SYSTEMS
- Publication number 20240313098
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- James Brian Johnson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY EXPANSION CARD
- Publication number 20240288925
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEUROMORPHIC MEMORY DEVICE AND METHOD
- Publication number 20240256473
- Publication date Aug 1, 2024
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MODULAR DIE CONFIGURATIONS FOR MULTI-CHANNEL MEMORY
- Publication number 20240237363
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- James Brian Johnson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REPAIR TECHNIQUES FOR COUPLED MEMORY DIES
- Publication number 20240194287
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- James Brian Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR THERMAL DISTRIBUTION IN COUPLED SEMICONDUCTOR SYSTEMS
- Publication number 20240186274
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- Amy Rae Griffin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES FOR COUPLED HOST AND MEMORY DIES
- Publication number 20240176523
- Publication date May 30, 2024
- Micron Technology, Inc.
- James Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTECTED REGIONS MANAGEMENT OF MEMORY
- Publication number 20240134677
- Publication date Apr 25, 2024
- Lodestar Licensing Group, LLC
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20240111673
- Publication date Apr 4, 2024
- Lodestar Licensing Group, LLC
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACKED MEMORY ROUTING TECHNIQUES
- Publication number 20240096852
- Publication date Mar 21, 2024
- Lodestar Licensing Group, LLC
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Application
TIGHTLY-COUPLED RANDOM ACCESS MEMORY INTERFACE SHIM DIE
- Publication number 20240088084
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Ameen D. Akel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY WITH PARALLEL MAIN AND TEST INTERFACES
- Publication number 20240071556
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- James Brian Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20240070069
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20230376235
- Publication date Nov 23, 2023
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...
- Publication number 20230206969
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE MULTIPLE PORT BUFFER TECHNIQUES
- Publication number 20230127970
- Publication date Apr 27, 2023
- Micron Technology, Inc.
- Jasper S. Gibbons
- G11 - INFORMATION STORAGE
Information Patent Application
FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY
- Publication number 20230080130
- Publication date Mar 16, 2023
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
FINER GRAIN DYNAMIC RANDOM ACCESS MEMORY
- Publication number 20230063029
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Brent Keeth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIGNAL DELIVERY IN STACKED DEVICE
- Publication number 20220415855
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Brent Keeth
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-PURPOSE SIGNALING FOR A MEMORY SYSTEM
- Publication number 20220404985
- Publication date Dec 22, 2022
- Micron Technology, Inc.
- James Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE PROTECTION
- Publication number 20220382631
- Publication date Dec 1, 2022
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20220342814
- Publication date Oct 27, 2022
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE PROTECTION
- Publication number 20220237077
- Publication date Jul 28, 2022
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACKED MEMORY ROUTING TECHNIQUES
- Publication number 20220208734
- Publication date Jun 30, 2022
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE

Brent Keeth

Person

Patents Grantslast 30 patents

Memory module multiple port buffer techniques

Memory device interface and method

Memory device interface and method

Memory with parallel main and test interfaces

Buffer configurations for communications between memory dies and a...

Memory device interface and method

Neuromorphic memory device and method

Memory expansion card

Memory device protection

Multi-purpose signaling for a memory system

Signal delivery in stacked device

Memory with fine grain architectures

Memory device interface and method

Latency offset for frame-based communications

Finer grain dynamic random access memory

Flexible memory system with a controller and a stack of memory

Translation system for finer grain memory architectures

Protected regions management of memory

Channel routing for memory devices

Unauthorized access command logging for memory

Memory device interface and method

Wafer-scale memory techniques

Reconfigurable memory architectures

Stacked semiconductor die assemblies with multiple thermal paths an...

Frame protocol of memory device

Memory module multiple port buffer techniques

Finer grain dynamic random access memory

Flexible memory system with a controller and a stack of memory

Memory device protection

Multi-purpose signaling for a memory system

Patents Applicationslast 30 patents

MEMORY WITH PARALLEL MAIN AND TEST INTERFACES

SPARING TECHNIQUES IN STACKED MEMORY ARCHITECTURES

BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...

DATA PROTECTION TECHNIQUES IN STACKED MEMORY ARCHITECTURES

INTERFACE TECHNIQUES FOR STACKED MEMORY ARCHITECTURES

DATA PATH SIGNAL AMPLIFICATION IN COUPLED SEMICONDUCTOR SYSTEMS

TRANSISTOR ARCHITECTURES IN COUPLED SEMICONDUCTOR SYSTEMS

MEMORY EXPANSION CARD

NEUROMORPHIC MEMORY DEVICE AND METHOD

TECHNIQUES FOR MODULAR DIE CONFIGURATIONS FOR MULTI-CHANNEL MEMORY

REPAIR TECHNIQUES FOR COUPLED MEMORY DIES

TECHNIQUES FOR THERMAL DISTRIBUTION IN COUPLED SEMICONDUCTOR SYSTEMS

TECHNIQUES FOR COUPLED HOST AND MEMORY DIES

PROTECTED REGIONS MANAGEMENT OF MEMORY

MEMORY DEVICE INTERFACE AND METHOD

STACKED MEMORY ROUTING TECHNIQUES

TIGHTLY-COUPLED RANDOM ACCESS MEMORY INTERFACE SHIM DIE

MEMORY WITH PARALLEL MAIN AND TEST INTERFACES

MEMORY DEVICE INTERFACE AND METHOD

MEMORY DEVICE INTERFACE AND METHOD

BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...

MEMORY MODULE MULTIPLE PORT BUFFER TECHNIQUES

FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY

FINER GRAIN DYNAMIC RANDOM ACCESS MEMORY

SIGNAL DELIVERY IN STACKED DEVICE

MULTI-PURPOSE SIGNALING FOR A MEMORY SYSTEM

MEMORY DEVICE PROTECTION

MEMORY DEVICE INTERFACE AND METHOD

MEMORY DEVICE PROTECTION

STACKED MEMORY ROUTING TECHNIQUES