Bret Alan Oeltjen

Person

Eiko, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Latch-based random access memory
- Patent number 7,800,936
- Issue date Sep 21, 2010
- LSI Logic Corporation
- Michael Norris Dillon
- G11 - INFORMATION STORAGE
Information Patent Grant
Enhanced power distribution in an integrated circuit
- Patent number 7,760,578
- Issue date Jul 20, 2010
- LSI Logic Corporation
- David Vinke
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch-based random access memory (LBRAM) tri-state banking architec...
- Patent number 7,266,021
- Issue date Sep 4, 2007
- LSI Corporation
- David Vinke
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch-based random access memory (LBRAM) with tri-state banking and...
- Patent number 7,233,540
- Issue date Jun 19, 2007
- LSI Corporation
- David Vinke
- G11 - INFORMATION STORAGE
Information Patent Grant
Automation of the development, testing, and release of a flow frame...
- Patent number 7,020,852
- Issue date Mar 28, 2006
- LSI Logic Corporation
- Bret Alan Oeltjen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit having voltage-down circuit regula...
- Patent number 6,934,171
- Issue date Aug 23, 2005
- LSI Logic Corporation
- Michael N. Dillon
- G05 - CONTROLLING REGULATING
Information Patent Grant
Reconfigurable memory architecture
- Patent number 6,864,716
- Issue date Mar 8, 2005
- LSI Logic Corporation
- Carl Anthony Monzel, III
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple-bit memory latch cell for integrated circuit gate array
- Patent number 6,800,882
- Issue date Oct 5, 2004
- LSI Logic Corporation
- Michael N. Dillon
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Enhanced Power Distribution in an Integrated Circuit
- Publication number 20100097875
- Publication date Apr 22, 2010
- David Vinke
- G11 - INFORMATION STORAGE
Information Patent Application
Latch-based Random Access Memory
- Publication number 20100002526
- Publication date Jan 7, 2010
- LSI Corporation
- Michael Norris Dillon
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit having voltage-down circuit regula...
- Publication number 20050068014
- Publication date Mar 31, 2005
- LSI Logic Corporation
- Michael N. Dillon
- G05 - CONTROLLING REGULATING
Information Patent Application
Reconfigurable memory architecture
- Publication number 20040246023
- Publication date Dec 9, 2004
- Carl Anthony Monzel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Automation of the development, testing, and release of a flow frame...
- Publication number 20040225972
- Publication date Nov 11, 2004
- LSI Logic Corporation
- Bret Alan Oeltjen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE-BIT MEMORY LATCH CELL FOR INTEGRATED CIRCUIT GATE ARRAY
- Publication number 20040169205
- Publication date Sep 2, 2004
- Michael N. Dillon
- H03 - BASIC ELECTRONIC CIRCUITRY

Bret Alan Oeltjen

Person

Patents Grantslast 30 patents

Latch-based random access memory

Enhanced power distribution in an integrated circuit

Latch-based random access memory (LBRAM) tri-state banking architec...

Latch-based random access memory (LBRAM) with tri-state banking and...

Automation of the development, testing, and release of a flow frame...

Semiconductor integrated circuit having voltage-down circuit regula...

Reconfigurable memory architecture

Multiple-bit memory latch cell for integrated circuit gate array

Patents Applicationslast 30 patents

Enhanced Power Distribution in an Integrated Circuit

Latch-based Random Access Memory

Semiconductor integrated circuit having voltage-down circuit regula...

Reconfigurable memory architecture

Automation of the development, testing, and release of a flow frame...

MULTIPLE-BIT MEMORY LATCH CELL FOR INTEGRATED CIRCUIT GATE ARRAY