Bret L. Toll

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Performing instruction fetch pipeline synchronization (IFPS) in pro...
- Patent number 12,346,264
- Issue date Jul 1, 2025
- Ampere Computing LLC
- Bret Leslie Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mitigation of return stack buffer side channel attacks in a processor
- Patent number 12,333,001
- Issue date Jun 17, 2025
- Ampere Computing LLC
- Benjamin Crawford Chaffin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for dot production operations
- Patent number 12,314,717
- Issue date May 27, 2025
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods to store a tile register pair to memory
- Patent number 12,293,186
- Issue date May 6, 2025
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatus for tile configuration
- Patent number 12,282,773
- Issue date Apr 22, 2025
- Intel Corporation
- Menachem Adelman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for matrix operations
- Patent number 12,282,525
- Issue date Apr 22, 2025
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems for performing instructions to quickly convert and use tile...
- Patent number 12,265,826
- Issue date Apr 1, 2025
- Intel Corporation
- Bret Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for matrix add, subtract, and mul...
- Patent number 12,260,213
- Issue date Mar 25, 2025
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods to load a tile register pair
- Patent number 12,236,242
- Issue date Feb 25, 2025
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtualization and multi-tenancy support in graphics processors
- Patent number 12,229,581
- Issue date Feb 18, 2025
- Intel Corporation
- Rajesh Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction execution that broadcasts and masks data values at diff...
- Patent number 12,197,617
- Issue date Jan 14, 2025
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, apparatuses, and methods for resource bandwidth enforcement
- Patent number 12,198,186
- Issue date Jan 14, 2025
- Intel Corporation
- Andrew Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile load, multiplication and...
- Patent number 12,182,571
- Issue date Dec 31, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for computing dot products of nibbles in two ti...
- Patent number 12,182,568
- Issue date Dec 31, 2024
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for performing matrix compress and decompress i...
- Patent number 12,175,246
- Issue date Dec 24, 2024
- Intel Corporation
- Dan Baum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile matrix multiplication an...
- Patent number 12,147,804
- Issue date Nov 19, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for a processor architecture
- Patent number 12,130,740
- Issue date Oct 29, 2024
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile transpose
- Patent number 12,124,847
- Issue date Oct 22, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for matrix operations
- Patent number 12,106,100
- Issue date Oct 1, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector friendly instruction format and execution thereof
- Patent number 12,086,594
- Issue date Sep 10, 2024
- Intel Corporation
- Robert C. Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatus for matrix move
- Patent number 12,039,332
- Issue date Jul 16, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packed data element predication processors, methods, systems, and i...
- Patent number 12,039,336
- Issue date Jul 16, 2024
- Intel Corporation
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile store
- Patent number 11,977,886
- Issue date May 7, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems for performing instructions to quickly convert and use tile...
- Patent number 11,954,489
- Issue date Apr 9, 2024
- Intel Corporation
- Bret Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for performing instructions to transform matric...
- Patent number 11,954,490
- Issue date Apr 9, 2024
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rotate instructions that complete execution either without writing...
- Patent number 11,900,108
- Issue date Feb 13, 2024
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatus for tile configuration
- Patent number 11,847,452
- Issue date Dec 19, 2023
- Intel Corporation
- Menachem Adelman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible storage and optimized search for multiple page sizes in a...
- Patent number 11,822,487
- Issue date Nov 21, 2023
- Ampere Computing LLC
- George Van Horn Leming
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for matrix operations
- Patent number 11,816,483
- Issue date Nov 14, 2023
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods to store a tile register pair to memory
- Patent number 11,809,869
- Issue date Nov 7, 2023
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Systems, Apparatuses, and Methods for Resource Bandwidth Enforcement
- Publication number 20250217882
- Publication date Jul 3, 2025
- Intel Corporation
- Andrew HERDRICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING MATRIX COMPRESS AND DECOMPRESS I...
- Publication number 20250199812
- Publication date Jun 19, 2025
- Intel Corporation
- Dan BAUM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR INSTRUCTION FUSION
- Publication number 20250130809
- Publication date Apr 24, 2025
- Ampere Computing LLC
- Benjamin Crawford CHAFFIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR MACRO-OPERATION FUSION
- Publication number 20250130807
- Publication date Apr 24, 2025
- Ampere Computing LLC
- Benjamin Crawford CHAFFIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING INSTRUCTION FETCH PIPELINE SYNCHRONIZATION (IFPS) IN PRO...
- Publication number 20250130953
- Publication date Apr 24, 2025
- Ampere Computing LLC
- Bret Leslie Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE TRANSPOSE
- Publication number 20250117221
- Publication date Apr 10, 2025
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AN...
- Publication number 20250117222
- Publication date Apr 10, 2025
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS WITH TOGGLEABLE MEMORY TAGGING EXTENSIONS AND RELATED ME...
- Publication number 20250103506
- Publication date Mar 27, 2025
- Ampere Computing LLC
- Bret Leslie Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE LOAD
- Publication number 20250004716
- Publication date Jan 2, 2025
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF
- Publication number 20240427600
- Publication date Dec 26, 2024
- Intel Corporation
- Robert C. VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPPARATUS FOR MATRIX MOVE
- Publication number 20240320001
- Publication date Sep 26, 2024
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE STORE
- Publication number 20240256276
- Publication date Aug 1, 2024
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX OPERATIONS
- Publication number 20240192954
- Publication date Jun 13, 2024
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX OPERATIONS
- Publication number 20240143325
- Publication date May 2, 2024
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS TO STORE A TILE REGISTER PAIR TO MEMORY
- Publication number 20240143328
- Publication date May 2, 2024
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX ADD, SUBTRACT, AND MUL...
- Publication number 20240134644
- Publication date Apr 25, 2024
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS FOR PERFORMING INSTRUCTIONS TO QUICKLY CONVERT AND USE TILE...
- Publication number 20240126551
- Publication date Apr 18, 2024
- Intel Corporation
- Bret TOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUS FOR TILE CONFIGURATION
- Publication number 20240111533
- Publication date Apr 4, 2024
- Intel Corporation
- Menachem ADELMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS FOR PERFORMING INSTRUCTIONS TO QUICKLY CONVERT AND USE TILE...
- Publication number 20240103867
- Publication date Mar 28, 2024
- Intel Corporation
- Bret TOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF
- Publication number 20240061683
- Publication date Feb 22, 2024
- Intel Corporation
- Robert C. VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZATION AND MULTI-TENANCY SUPPORT IN GRAPHICS PROCESSORS
- Publication number 20240061700
- Publication date Feb 22, 2024
- Intel Corporation
- Rajesh SANKARAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING MATRIX COMPRESS AND DECOMPRESS I...
- Publication number 20240045690
- Publication date Feb 8, 2024
- Intel Corporation
- Dan BAUM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION EXECUTION THAT BROADCASTS AND MASKS DATA VALUES AT DIFF...
- Publication number 20230409732
- Publication date Dec 21, 2023
- Intel Corporation
- ELMOUSTAPHA OULD-AHMED-VALL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR COMPUTING DOT PRODUCTS OF NIBBLES IN TWO TI...
- Publication number 20230385059
- Publication date Nov 30, 2023
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO TRANSFORM MATRIC...
- Publication number 20230350682
- Publication date Nov 2, 2023
- Intel Corporation
- Raanan SADE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE LOAD
- Publication number 20230236833
- Publication date Jul 27, 2023
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS TO LOAD A TILE REGISTER PAIR
- Publication number 20230229446
- Publication date Jul 20, 2023
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...
- Publication number 20230108016
- Publication date Apr 6, 2023
- Intel Corporation
- Bret L. TOLL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO TRANSFORM MATRIC...
- Publication number 20220357950
- Publication date Nov 10, 2022
- Intel Corporation
- Raanan SADE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR ZEROING A MATRIX
- Publication number 20220300286
- Publication date Sep 22, 2022
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING

Bret L. Toll

Person

Patents Grantslast 30 patents

Performing instruction fetch pipeline synchronization (IFPS) in pro...

Mitigation of return stack buffer side channel attacks in a processor

Systems, methods, and apparatuses for dot production operations

Systems and methods to store a tile register pair to memory

Systems, methods, and apparatus for tile configuration

Systems, methods, and apparatuses for matrix operations

Systems for performing instructions to quickly convert and use tile...

Systems, methods, and apparatuses for matrix add, subtract, and mul...

Systems and methods to load a tile register pair

Virtualization and multi-tenancy support in graphics processors

Instruction execution that broadcasts and masks data values at diff...

Systems, apparatuses, and methods for resource bandwidth enforcement

Systems, methods, and apparatuses for tile load, multiplication and...

Systems and methods for computing dot products of nibbles in two ti...

Systems and methods for performing matrix compress and decompress i...

Systems, methods, and apparatuses for tile matrix multiplication an...

Apparatuses and methods for a processor architecture

Systems, methods, and apparatuses for tile transpose

Systems, methods, and apparatuses for matrix operations

Vector friendly instruction format and execution thereof

Systems, methods, and apparatus for matrix move

Packed data element predication processors, methods, systems, and i...

Systems, methods, and apparatuses for tile store

Systems for performing instructions to quickly convert and use tile...

Systems and methods for performing instructions to transform matric...

Rotate instructions that complete execution either without writing...

Systems, methods, and apparatus for tile configuration

Flexible storage and optimized search for multiple page sizes in a...

Systems, methods, and apparatuses for matrix operations

Systems and methods to store a tile register pair to memory

Patents Applicationslast 30 patents

Systems, Apparatuses, and Methods for Resource Bandwidth Enforcement

SYSTEMS AND METHODS FOR PERFORMING MATRIX COMPRESS AND DECOMPRESS I...

MECHANISM FOR INSTRUCTION FUSION

PROCESSOR MACRO-OPERATION FUSION

PERFORMING INSTRUCTION FETCH PIPELINE SYNCHRONIZATION (IFPS) IN PRO...

SYSTEMS, METHODS, AND APPARATUSES FOR TILE TRANSPOSE

SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AN...

PROCESSORS WITH TOGGLEABLE MEMORY TAGGING EXTENSIONS AND RELATED ME...

SYSTEMS, METHODS, AND APPARATUSES FOR TILE LOAD

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

SYSTEMS, METHODS, AND APPPARATUS FOR MATRIX MOVE

SYSTEMS, METHODS, AND APPARATUSES FOR TILE STORE

SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX OPERATIONS

SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX OPERATIONS

SYSTEMS AND METHODS TO STORE A TILE REGISTER PAIR TO MEMORY

SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX ADD, SUBTRACT, AND MUL...

SYSTEMS FOR PERFORMING INSTRUCTIONS TO QUICKLY CONVERT AND USE TILE...

SYSTEMS, METHODS, AND APPARATUS FOR TILE CONFIGURATION

SYSTEMS FOR PERFORMING INSTRUCTIONS TO QUICKLY CONVERT AND USE TILE...

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

VIRTUALIZATION AND MULTI-TENANCY SUPPORT IN GRAPHICS PROCESSORS

SYSTEMS AND METHODS FOR PERFORMING MATRIX COMPRESS AND DECOMPRESS I...

INSTRUCTION EXECUTION THAT BROADCASTS AND MASKS DATA VALUES AT DIFF...

SYSTEMS AND METHODS FOR COMPUTING DOT PRODUCTS OF NIBBLES IN TWO TI...

SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO TRANSFORM MATRIC...

SYSTEMS, METHODS, AND APPARATUSES FOR TILE LOAD

SYSTEMS AND METHODS TO LOAD A TILE REGISTER PAIR

PACKED DATA ELEMENT PREDICATION PROCESSORS, METHODS, SYSTEMS, AND I...

SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO TRANSFORM MATRIC...

SYSTEMS, METHODS, AND APPARATUSES FOR ZEROING A MATRIX