Brian D. BARRICK

Person

Pflugerville, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Assignment of microprocessor register tags at issue time
- Patent number 11,995,445
- Issue date May 28, 2024
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast mapper restore for flush in processor
- Patent number 11,941,398
- Issue date Mar 26, 2024
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dependency skipping in a load-compare-jump sequence of instructions...
- Patent number 11,886,883
- Issue date Jan 30, 2024
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inferring future value for speculative branch resolution in a micro...
- Patent number 11,868,773
- Issue date Jan 9, 2024
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inferring future value for speculative branch resolution
- Patent number 11,709,676
- Issue date Jul 25, 2023
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dependency skipping execution
- Patent number 11,663,013
- Issue date May 30, 2023
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-the-fly adjustment of issue-write back latency to avoid write ba...
- Patent number 11,561,798
- Issue date Jan 24, 2023
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution elision of intermediate instruction by processor
- Patent number 11,537,402
- Issue date Dec 27, 2022
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast perfect issue of dependent instructions in a distributed issue...
- Patent number 11,531,548
- Issue date Dec 20, 2022
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Assignment of microprocessor register tags at issue time
- Patent number 11,500,642
- Issue date Nov 15, 2022
- International Busines Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Steering a history buffer entry to a specific recovery port during...
- Patent number 11,403,109
- Issue date Aug 2, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Program counter (PC)-relative load and store addressing for fused i...
- Patent number 11,392,386
- Issue date Jul 19, 2022
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical register recovery within a processor
- Patent number 11,360,779
- Issue date Jun 14, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Slice-based allocation history buffer
- Patent number 11,360,775
- Issue date Jun 14, 2022
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor providing intelligent management of values buffered in ov...
- Patent number 11,327,757
- Issue date May 10, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling and fusing load instructions in a processor
- Patent number 11,249,757
- Issue date Feb 15, 2022
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fused overloaded register file read to enable 2-cycle move from con...
- Patent number 11,194,578
- Issue date Dec 7, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and handling of register data in processors
- Patent number 11,188,332
- Issue date Nov 30, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pairing issue queues for complex instructions and instruction fusion
- Patent number 11,182,164
- Issue date Nov 23, 2021
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fusion to enhance early address generation of load instructions in...
- Patent number 11,163,571
- Issue date Nov 2, 2021
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supporting speculative microprocessor instruction execution
- Patent number 11,144,364
- Issue date Oct 12, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing a hardware level...
- Patent number 11,138,050
- Issue date Oct 5, 2021
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Check pointing of accumulator register results in a microprocessor
- Patent number 11,119,772
- Issue date Sep 14, 2021
- International Business Machines Corporation
- Steven J Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register file write using pointers
- Patent number 11,093,282
- Issue date Aug 17, 2021
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High bandwidth logical register flush recovery
- Patent number 11,068,267
- Issue date Jul 20, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency execution of floating-point record form instructions
- Patent number 10,996,953
- Issue date May 4, 2021
- International Business Machines Corporation
- Brian J. D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache miss thread balancing
- Patent number 10,963,380
- Issue date Mar 30, 2021
- International Business Machines Corporation
- Gregory W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and handling of register data in processors
- Patent number 10,956,158
- Issue date Mar 23, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical register recovery within a processor
- Patent number 10,949,213
- Issue date Mar 16, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Issue queue snooping for asynchronous flush and restore of distribu...
- Patent number 10,909,034
- Issue date Feb 2, 2021
- International Business Machines Corporation
- David R. Terry
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INFERRING FUTURE VALUE FOR SPECULATIVE BRANCH RESOLUTION IN A MICRO...
- Publication number 20230214218
- Publication date Jul 6, 2023
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASSIGNMENT OF MICROPROCESSOR REGISTER TAGS AT ISSUE TIME
- Publication number 20230077629
- Publication date Mar 16, 2023
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEPENDENCY SKIPPING EXECUTION WITH AUTO-FINISH FOR A MICROPROCESSOR
- Publication number 20230068640
- Publication date Mar 2, 2023
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEPENDENCY SKIPPING EXECUTION
- Publication number 20230060910
- Publication date Mar 2, 2023
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFERRING FUTURE VALUE FOR SPECULATIVE BRANCH RESOLUTION
- Publication number 20230053981
- Publication date Feb 23, 2023
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXECUTION ELISION OF INTERMEDIATE INSTRUCTION BY PROCESSOR
- Publication number 20230028929
- Publication date Jan 26, 2023
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST PERFECT ISSUE OF DEPENDENT INSTRUCTIONS IN A DISTRIBUTED ISSUE...
- Publication number 20220413868
- Publication date Dec 29, 2022
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASSIGNMENT OF MICROPROCESSOR REGISTER TAGS AT ISSUE TIME
- Publication number 20220147359
- Publication date May 12, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAM COUNTER (PC)-RELATIVE LOAD AND STORE ADDRESSING
- Publication number 20220050684
- Publication date Feb 17, 2022
- International Business Machines Corporation
- Nicholas R. Orzol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING AND FUSING LOAD INSTRUCTIONS IN A PROCESSOR
- Publication number 20220050679
- Publication date Feb 17, 2022
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-THE-FLY ADJUSTMENT OF ISSUE-WRITE BACK LATENCY TO AVOID WRITE BA...
- Publication number 20220035637
- Publication date Feb 3, 2022
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR PROVIDING INTELLIGENT MANAGEMENT OF VALUES BUFFERED IN OV...
- Publication number 20210342150
- Publication date Nov 4, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHECK POINTING OF ACCUMULATOR REGISTER RESULTS IN A MICROPROCESSOR
- Publication number 20210173649
- Publication date Jun 10, 2021
- International Business Machines Corporation
- Steven J Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL REGISTER RECOVERY WITHIN A PROCESSOR
- Publication number 20210089322
- Publication date Mar 25, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND HANDLING OF REGISTER DATA IN PROCESSORS
- Publication number 20200356366
- Publication date Nov 12, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND HANDLING OF REGISTER DATA IN PROCESSORS
- Publication number 20200356369
- Publication date Nov 12, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH BANDWIDTH LOGICAL REGISTER FLUSH RECOVERY
- Publication number 20200341767
- Publication date Oct 29, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER FILE WRITE USING POINTERS
- Publication number 20200326978
- Publication date Oct 15, 2020
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORTING SPECULATIVE MICROPROCESSOR INSTRUCTION EXECUTION
- Publication number 20200241931
- Publication date Jul 30, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLICE-BASED ALLOCATION HISTORY BUFFER
- Publication number 20200225957
- Publication date Jul 16, 2020
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE FLUSH RECOVERY LOOKUP IN A PROCESSOR
- Publication number 20200183701
- Publication date Jun 11, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL REGISTER RECOVERY WITHIN A PROCESSOR
- Publication number 20200183700
- Publication date Jun 11, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLUSH-RECOVERY BANDWIDTH IN A PROCESSOR
- Publication number 20200159564
- Publication date May 21, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dispatching, Allocating, and Deallocating Instructions in a Queue i...
- Publication number 20200042319
- Publication date Feb 6, 2020
- International Business Machines Corporation
- Bryan Lloyd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple Level History Buffer for Transaction Memory Support
- Publication number 20200019405
- Publication date Jan 16, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY EXECUTION OF FLOATING-POINT RECORD FORM INSTRUCTIONS
- Publication number 20190391810
- Publication date Dec 26, 2019
- International Business Machines Corporation
- Brian J.D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC ADJUSTMENT OF ISSUE-TO-ISSUE DELAY BETWEEN DEPENDENT INSTRU...
- Publication number 20190377577
- Publication date Dec 12, 2019
- International Business Machines Corporation
- Dongkook PARK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fused Overloaded Register File Read to Enable 2-Cycle Move from Con...
- Publication number 20190361698
- Publication date Nov 28, 2019
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MISS THREAD BALANCING
- Publication number 20190227932
- Publication date Jul 25, 2019
- International Business Machines Corporation
- Gregory W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A HARDWARE LEVEL...
- Publication number 20190213055
- Publication date Jul 11, 2019
- International Business Machines Corporation
- BRIAN D. BARRICK
- G06 - COMPUTING CALCULATING COUNTING

Brian D. BARRICK

Person

Patents Grantslast 30 patents

Assignment of microprocessor register tags at issue time

Fast mapper restore for flush in processor

Dependency skipping in a load-compare-jump sequence of instructions...

Inferring future value for speculative branch resolution in a micro...

Inferring future value for speculative branch resolution

Dependency skipping execution

On-the-fly adjustment of issue-write back latency to avoid write ba...

Execution elision of intermediate instruction by processor

Fast perfect issue of dependent instructions in a distributed issue...

Assignment of microprocessor register tags at issue time

Steering a history buffer entry to a specific recovery port during...

Program counter (PC)-relative load and store addressing for fused i...

Logical register recovery within a processor

Slice-based allocation history buffer

Processor providing intelligent management of values buffered in ov...

Handling and fusing load instructions in a processor

Fused overloaded register file read to enable 2-cycle move from con...

System and handling of register data in processors

Pairing issue queues for complex instructions and instruction fusion

Fusion to enhance early address generation of load instructions in...

Supporting speculative microprocessor instruction execution

Operation of a multi-slice processor implementing a hardware level...

Check pointing of accumulator register results in a microprocessor

Register file write using pointers

High bandwidth logical register flush recovery

Low latency execution of floating-point record form instructions

Cache miss thread balancing

System and handling of register data in processors

Logical register recovery within a processor

Issue queue snooping for asynchronous flush and restore of distribu...

Patents Applicationslast 30 patents

INFERRING FUTURE VALUE FOR SPECULATIVE BRANCH RESOLUTION IN A MICRO...

ASSIGNMENT OF MICROPROCESSOR REGISTER TAGS AT ISSUE TIME

DEPENDENCY SKIPPING EXECUTION WITH AUTO-FINISH FOR A MICROPROCESSOR

DEPENDENCY SKIPPING EXECUTION

INFERRING FUTURE VALUE FOR SPECULATIVE BRANCH RESOLUTION

EXECUTION ELISION OF INTERMEDIATE INSTRUCTION BY PROCESSOR

FAST PERFECT ISSUE OF DEPENDENT INSTRUCTIONS IN A DISTRIBUTED ISSUE...

ASSIGNMENT OF MICROPROCESSOR REGISTER TAGS AT ISSUE TIME

PROGRAM COUNTER (PC)-RELATIVE LOAD AND STORE ADDRESSING

HANDLING AND FUSING LOAD INSTRUCTIONS IN A PROCESSOR

ON-THE-FLY ADJUSTMENT OF ISSUE-WRITE BACK LATENCY TO AVOID WRITE BA...

PROCESSOR PROVIDING INTELLIGENT MANAGEMENT OF VALUES BUFFERED IN OV...

CHECK POINTING OF ACCUMULATOR REGISTER RESULTS IN A MICROPROCESSOR

LOGICAL REGISTER RECOVERY WITHIN A PROCESSOR

SYSTEM AND HANDLING OF REGISTER DATA IN PROCESSORS

SYSTEM AND HANDLING OF REGISTER DATA IN PROCESSORS

HIGH BANDWIDTH LOGICAL REGISTER FLUSH RECOVERY

REGISTER FILE WRITE USING POINTERS

SUPPORTING SPECULATIVE MICROPROCESSOR INSTRUCTION EXECUTION

SLICE-BASED ALLOCATION HISTORY BUFFER

SPECULATIVE FLUSH RECOVERY LOOKUP IN A PROCESSOR

LOGICAL REGISTER RECOVERY WITHIN A PROCESSOR

FLUSH-RECOVERY BANDWIDTH IN A PROCESSOR

Dispatching, Allocating, and Deallocating Instructions in a Queue i...

Multiple Level History Buffer for Transaction Memory Support

LOW LATENCY EXECUTION OF FLOATING-POINT RECORD FORM INSTRUCTIONS

DYNAMIC ADJUSTMENT OF ISSUE-TO-ISSUE DELAY BETWEEN DEPENDENT INSTRU...

Fused Overloaded Register File Read to Enable 2-Cycle Move from Con...

CACHE MISS THREAD BALANCING

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A HARDWARE LEVEL...