Brian J. Kaczynski

Person

Los Altos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Controlling timing in asynchronous digital circuits
- Patent number 7,982,518
- Issue date Jul 19, 2011
- Atheros Communications, Inc.
- Brian J. Kaczynski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Stacking baseband circuits using deep n-well and increased supply v...
- Patent number 7,813,711
- Issue date Oct 12, 2010
- Atheros Communications, Inc.
- Brian J. Kaczynski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Inter-stage coupling with a transformer and parallel AC-coupling ca...
- Patent number 7,768,363
- Issue date Aug 3, 2010
- Atheros Communications, Inc.
- Brian J. Kaczynski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power control on a packet-by-packet basis in a CMOS transceiver
- Patent number 7,400,691
- Issue date Jul 15, 2008
- Atheros Communications, Inc.
- Brian J. Kaczynski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for a transceiver having a constant power output
- Patent number 7,170,953
- Issue date Jan 30, 2007
- Atheros Communications, Inc.
- Brian J. Kaczynski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for a transceiver having a constant power output
- Patent number 7,065,155
- Issue date Jun 20, 2006
- Atheros Communications, Inc.
- Brian J. Kaczynski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated low power channel select filter having high dynamic rang...
- Patent number 7,051,063
- Issue date May 23, 2006
- Atheros Communications, Inc.
- Brian Kaczynski
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Power Control On A Packet-By-Packet Basis In A CMOS Transceiver
- Publication number 20070111684
- Publication date May 17, 2007
- Brian J. Kaczynski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for a transceiver having a constant power output
- Publication number 20060083331
- Publication date Apr 20, 2006
- Brian J. Kaczynski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Integrated low power channel select filter having high dynamic rang...
- Publication number 20030207679
- Publication date Nov 6, 2003
- ATHEROS COMMUNICATIONS, INC.
- Brian Kaczynski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for a transceiver having a constant power output
- Publication number 20020080890
- Publication date Jun 27, 2002
- Brian J. Kaczynski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Brian J. Kaczynski

Person

Patents Grantslast 30 patents

Controlling timing in asynchronous digital circuits

Stacking baseband circuits using deep n-well and increased supply v...

Inter-stage coupling with a transformer and parallel AC-coupling ca...

Power control on a packet-by-packet basis in a CMOS transceiver

Method and apparatus for a transceiver having a constant power output

Method and apparatus for a transceiver having a constant power output

Integrated low power channel select filter having high dynamic rang...

Patents Applicationslast 30 patents

Power Control On A Packet-By-Packet Basis In A CMOS Transceiver

Method and apparatus for a transceiver having a constant power output

Integrated low power channel select filter having high dynamic rang...

Method and apparatus for a transceiver having a constant power output