Brian McGee

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for invasive debug of a processor without proce...
- Patent number 10,296,432
- Issue date May 21, 2019
- Intel Corporation
- Karthikeyan Avudaiyappan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for invasive debug of a processor without proce...
- Patent number 9,665,468
- Issue date May 30, 2017
- Intel Corporation
- Karthikeyan Avudaiyappan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical domain error isolation and recovery in a multi-domain system
- Patent number 9,256,500
- Issue date Feb 9, 2016
- Oracle International Corporation
- Jurgen M. Schulz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bandwidth-efficient directory-based coherence protocol
- Patent number 8,516,199
- Issue date Aug 20, 2013
- Oracle America, Inc.
- Robert E. Cypher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor and method for device-specific memory address translation
- Patent number 7,487,327
- Issue date Feb 3, 2009
- Sun Microsystems, Inc.
- Bruce J. Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller and method using read and write queues and an ord...
- Patent number 6,877,077
- Issue date Apr 5, 2005
- Sun Microsystems, Inc.
- Brian J. McGee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for using a page tracking buffer to reduce main m...
- Patent number 6,535,966
- Issue date Mar 18, 2003
- Sun Microsystems, Inc.
- Rajasekhar Cherabuddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to reduce memory latencies by performing two levels of specu...
- Patent number 6,496,917
- Issue date Dec 17, 2002
- Sun Microsystems, Inc.
- Rajasekhar Cherabuddi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEMS AND METHODS FOR INVASIVE DEBUG OF A PROCESSOR WITHOUT PROCE...
- Publication number 20170235656
- Publication date Aug 17, 2017
- Intel Corporation
- Karthikeyan AVUDAIYAPPAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR INVASIVE DEBUG OF A PROCESSOR WITHOUT PROCE...
- Publication number 20150052401
- Publication date Feb 19, 2015
- SOFT MACHINES, INC.
- Karthikeyan AVUDAIYAPPAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL DOMAIN ERROR ISOLATION AND RECOVERY IN A MULTI-DOMAIN SYSTEM
- Publication number 20140310555
- Publication date Oct 16, 2014
- Oracle International Corporation
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BANDWIDTH-EFFICIENT DIRECTORY-BASED COHERENCE PROTOCOL
- Publication number 20100241814
- Publication date Sep 23, 2010
- SUN MICROSYSTEMS, INC.
- Robert E. Cypher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to reduce memory latency
- Publication number 20030110350
- Publication date Jun 12, 2003
- Brian J. McGee
- G06 - COMPUTING CALCULATING COUNTING

Brian McGee

Person

Patents Grantslast 30 patents

Systems and methods for invasive debug of a processor without proce...

Systems and methods for invasive debug of a processor without proce...

Physical domain error isolation and recovery in a multi-domain system

Bandwidth-efficient directory-based coherence protocol

Processor and method for device-specific memory address translation

Memory controller and method using read and write queues and an ord...

System and method for using a page tracking buffer to reduce main m...

Method to reduce memory latencies by performing two levels of specu...

Patents Applicationslast 30 patents

SYSTEMS AND METHODS FOR INVASIVE DEBUG OF A PROCESSOR WITHOUT PROCE...

SYSTEMS AND METHODS FOR INVASIVE DEBUG OF A PROCESSOR WITHOUT PROCE...

PHYSICAL DOMAIN ERROR ISOLATION AND RECOVERY IN A MULTI-DOMAIN SYSTEM

BANDWIDTH-EFFICIENT DIRECTORY-BASED COHERENCE PROTOCOL

Method and apparatus to reduce memory latency