Brian R. Bennett

Person

Laguna Niguel, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Prevention of live-lock in a multi-processor system
- Patent number 7,558,923
- Issue date Jul 7, 2009
- Intel Corporation
- Brian R. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
External means of overriding and controlling cacheability attribute...
- Patent number 5,900,014
- Issue date May 4, 1999
- AST Research, Inc.
- Brian R. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimum latency bus interface circuit with reduced I/O pin count th...
- Patent number 5,694,614
- Issue date Dec 2, 1997
- AST Research, Inc.
- Brian R. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor system bus protocol for optimized accessing of inter...
- Patent number 5,590,299
- Issue date Dec 31, 1996
- AST Research, Inc.
- Brian R. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for increasing bus bandwidth on a system bus b...
- Patent number 5,588,125
- Issue date Dec 24, 1996
- AST Research, Inc.
- Brian R. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signaling protocol for concurrent bus access in a multiprocessor sy...
- Patent number 5,426,740
- Issue date Jun 20, 1995
- AST Research, Inc.
- Brian R. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus control system and method that selectively generate an early ad...
- Patent number 5,404,464
- Issue date Apr 4, 1995
- AST Research, Inc.
- Brian R. Bennett
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ESTABLISHING COLD STORAGE POOLS FROM AGING MEMORY
- Publication number 20160092353
- Publication date Mar 31, 2016
- Robert C. Swanson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low latency memory access method using unified queue mechanism
- Publication number 20040059880
- Publication date Mar 25, 2004
- Brian R. Bennett
- G06 - COMPUTING CALCULATING COUNTING

Brian R. Bennett

Person

Patents Grantslast 30 patents

Prevention of live-lock in a multi-processor system

External means of overriding and controlling cacheability attribute...

Minimum latency bus interface circuit with reduced I/O pin count th...

Multiprocessor system bus protocol for optimized accessing of inter...

Method and apparatus for increasing bus bandwidth on a system bus b...

Signaling protocol for concurrent bus access in a multiprocessor sy...

Bus control system and method that selectively generate an early ad...

Patents Applicationslast 30 patents

ESTABLISHING COLD STORAGE POOLS FROM AGING MEMORY

Low latency memory access method using unified queue mechanism