Brian R. Lee

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Colorado Springs, CO, US

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor wafer having a layer-to-layer alignment mark and meth...
- Patent number 6,288,454
- Issue date Sep 11, 2001
- LSI Logic Corporation
- Derryl D. J. Allman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of manufacturing semiconductor device having a recessed gate...
- Patent number 6,277,707
- Issue date Aug 21, 2001
- LSI Logic Corporation
- Brian R. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor wafer having a layer-to-layer alignment mark and meth...
- Patent number 6,136,662
- Issue date Oct 24, 2000
- LSI Logic Corporation
- Derryl D. J. Allman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Variable step height control of lithographic patterning through tra...
- Patent number 5,821,013
- Issue date Oct 13, 1998
- Symbios, Inc.
- Gayle W. Miller
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Silica-based anti-reflective planarizing layer
- Patent number 5,100,503
- Issue date Mar 31, 1992
- NCR Corporation
- Derryl D. J. Allman
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor device having a recessed gate structure and method of...
- Publication number 20010042874
- Publication date Nov 22, 2001
- Brian R. Lee
- H01 - BASIC ELECTRIC ELEMENTS