Brian T. Pecha

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory with programmable refresh order and stagger time
- Patent number 11,967,353
- Issue date Apr 23, 2024
- Vaughn N. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with improved command/address bus utilization
- Patent number 11,934,326
- Issue date Mar 19, 2024
- Debra M. Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with programmable refresh order and stagger time
- Patent number 11,468,938
- Issue date Oct 11, 2022
- Micron Technology, Inc.
- Vaughn N. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Conditional row activation and access during refresh for memory dev...
- Patent number 11,468,939
- Issue date Oct 11, 2022
- Micron Technology, Inc.
- Miles S. Wiscombe
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with improved command/address bus utilization
- Patent number 11,409,674
- Issue date Aug 9, 2022
- Micron Technology, Inc.
- Debra M. Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Targeted test fail injection
- Patent number 11,335,426
- Issue date May 17, 2022
- Micron Technology, Inc.
- Brian Thomas Pecha
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY WITH IMPROVED COMMAND/ADDRESS BUS UTILIZATION
- Publication number 20240281387
- Publication date Aug 22, 2024
- Lodestar Licensing Group LLC
- Debra M. Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME
- Publication number 20240249764
- Publication date Jul 25, 2024
- Lodestar Licensing Group LLC
- Vaughn N. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME
- Publication number 20230029003
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Vaughn N. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH IMPROVED COMMAND/ADDRESS BUS UTILIZATION
- Publication number 20220391334
- Publication date Dec 8, 2022
- Micron Technology, Inc.
- Debra M. Bell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONDITIONAL ROW ACTIVATION AND ACCESS DURING REFRESH FOR MEMORY DEV...
- Publication number 20220172771
- Publication date Jun 2, 2022
- Micron Technology, Inc.
- Miles S. Wiscombe
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME
- Publication number 20220148647
- Publication date May 12, 2022
- Micron Technology, Inc.
- Vaughn N. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
TARGETED TEST FAIL INJECTION
- Publication number 20220122684
- Publication date Apr 21, 2022
- Micron Technology, Inc.
- Brian Thomas Pecha
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH IMPROVED COMMAND/ADDRESS BUS UTILIZATION
- Publication number 20220107905
- Publication date Apr 7, 2022
- Micron Technology, Inc.
- Debra M. Bell
- G06 - COMPUTING CALCULATING COUNTING

Brian T. Pecha

Person

Patents Grantslast 30 patents

Memory with programmable refresh order and stagger time

Memory with improved command/address bus utilization

Memory with programmable refresh order and stagger time

Conditional row activation and access during refresh for memory dev...

Memory with improved command/address bus utilization

Targeted test fail injection

Patents Applicationslast 30 patents

MEMORY WITH IMPROVED COMMAND/ADDRESS BUS UTILIZATION

MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME

MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME

MEMORY WITH IMPROVED COMMAND/ADDRESS BUS UTILIZATION

CONDITIONAL ROW ACTIVATION AND ACCESS DURING REFRESH FOR MEMORY DEV...

MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME

TARGETED TEST FAIL INJECTION

MEMORY WITH IMPROVED COMMAND/ADDRESS BUS UTILIZATION