Bruce B. Pedersen

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for detecting and mitigating programmable logic...
- Patent number 11,436,382
- Issue date Sep 6, 2022
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for protecting security features of integrated circuits
- Patent number 10,657,291
- Issue date May 19, 2020
- Altera Corporation
- Bruce Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for detecting and mitigating of programmable lo...
- Patent number 10,592,699
- Issue date Mar 17, 2020
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Differential power analysis resistant encryption and decryption fun...
- Patent number 10,320,554
- Issue date Jun 11, 2019
- Altera Corporation
- Bruce B. Pedersen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Omnibus logic element
- Patent number 10,177,766
- Issue date Jan 8, 2019
- Altera Corporation
- James Schleicher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure physically unclonable function (PUF) error correction
- Patent number 10,142,102
- Issue date Nov 27, 2018
- Altera Corporation
- Bruce Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for authenticating firmware stored on an integr...
- Patent number 10,114,941
- Issue date Oct 30, 2018
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for protecting security features of integrated circuits
- Patent number 10,095,889
- Issue date Oct 9, 2018
- Altera Corporation
- Bruce Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for preventing data remanence in memory systems
- Patent number 10,073,989
- Issue date Sep 11, 2018
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Setting security features of programmable logic devices
- Patent number 10,037,438
- Issue date Jul 31, 2018
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for securing programming data of a programmabl...
- Patent number 9,870,488
- Issue date Jan 16, 2018
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for detecting and mitigating programmable logic...
- Patent number 9,852,315
- Issue date Dec 26, 2017
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Address arithmetic on block RAMs
- Patent number 9,837,133
- Issue date Dec 5, 2017
- Altera Corporation
- Bruce B. Pedersen
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for performing reverse order cryptographic oper...
- Patent number 9,832,022
- Issue date Nov 28, 2017
- Altera Corporation
- Bruce Pedersen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Setting security features of programmable logic devices
- Patent number 9,767,321
- Issue date Sep 19, 2017
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Security variable scrambling
- Patent number 9,722,778
- Issue date Aug 1, 2017
- Altera Corporation
- Bruce B. Pedersen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secure physically unclonable function (PUF) error correction
- Patent number 9,703,989
- Issue date Jul 11, 2017
- Altera Corporation
- Bruce Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emulation of synchronous pipeline registers in integrated circuits...
- Patent number 9,665,670
- Issue date May 30, 2017
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for preventing data remanence in memory systems
- Patent number 9,646,177
- Issue date May 9, 2017
- Altera Corporation
- Bruce B. Pedersen
- G11 - INFORMATION STORAGE
Information Patent Grant
Physically unclonable functions with enhanced margin testing
- Patent number 9,590,626
- Issue date Mar 7, 2017
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Stability-enhanced physically unclonable function circuitry
- Patent number 9,577,637
- Issue date Feb 21, 2017
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Secure bitstream authentication
- Patent number 9,577,822
- Issue date Feb 21, 2017
- Altera Corporation
- Bruce B. Pedersen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secure partial reconfiguration regions
- Patent number 9,577,643
- Issue date Feb 21, 2017
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transceiver system with reduced latency uncertainty
- Patent number 9,559,881
- Issue date Jan 31, 2017
- Altera Corporation
- Neville Carvalho
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Omnibus logic element
- Patent number 9,496,875
- Issue date Nov 15, 2016
- Altera Corporation
- James Schleicher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for improving reliability of electronic circuitry and ass...
- Patent number 9,455,715
- Issue date Sep 27, 2016
- Alterm Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for generating a key difficult to clone
- Patent number 9,438,418
- Issue date Sep 6, 2016
- Altera Corporation
- Bruce B. Pedersen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Security variable scrambling
- Patent number 9,425,959
- Issue date Aug 23, 2016
- Altera Corporation
- Bruce B. Pedersen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Address arithmetic on block RAMs
- Patent number 9,367,450
- Issue date Jun 14, 2016
- Altera Corporation
- Bruce B. Pedersen
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for automatic fault detection
- Patent number 9,360,522
- Issue date Jun 7, 2016
- Altera Corporation
- Bruce B. Pedersen
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DIFFERENTIAL POWER ANALYSIS RESISTANT ENCRYPTION AND DECRYPTION FUN...
- Publication number 20200244434
- Publication date Jul 30, 2020
- Altera Corporation
- Bruce B. Pedersen
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Application
SYSTEMS AND METHODS FOR DETECTING AND MITIGATING PROGRAMMABLE LOGIC...
- Publication number 20200184118
- Publication date Jun 11, 2020
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE DEVICE AUTHENTICATION DECRYPTION
- Publication number 20190050603
- Publication date Feb 14, 2019
- Intel Corporation
- Sean R. Atsatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Protecting Security Features of Integrated Circuits
- Publication number 20190026497
- Publication date Jan 24, 2019
- Altera Corporation
- Bruce Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PREVENTING DATA REMANENCE IN MEMORY SYSTEMS
- Publication number 20180121682
- Publication date May 3, 2018
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Detecting and Mitigating of Programmable Lo...
- Publication number 20180068136
- Publication date Mar 8, 2018
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR AUTHENTICATING FIRMWARE STORED ON AN INTEGR...
- Publication number 20180060561
- Publication date Mar 1, 2018
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SETTING SECURITY FEATURES OF PROGRAMMABLE LOGIC DEVICES
- Publication number 20170308721
- Publication date Oct 26, 2017
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE PHYSICALLY UNCLONABLE FUNCTION (PUF) ERROR CORRECTION
- Publication number 20170295015
- Publication date Oct 12, 2017
- Altera Corporation
- Bruce Pedersen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Techniques For Protecting Security Features of Integrated Circuits
- Publication number 20170257222
- Publication date Sep 7, 2017
- Altera Corporation
- Bruce Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EMULATION OF SYNCHRONOUS PIPELINE REGISTERS IN INTEGRATED CIRCUITS...
- Publication number 20170249409
- Publication date Aug 31, 2017
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR AUTOMATIC FAULT DETECTION
- Publication number 20160116536
- Publication date Apr 28, 2016
- Altera Corporation
- Bruce B. Pedersen
- G01 - MEASURING TESTING
Information Patent Application
STABILITY-ENHANCED PHYSICALLY UNCLONABLE FUNCTION CIRCUITRY
- Publication number 20150236698
- Publication date Aug 20, 2015
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR SECURING CONFIGURATION SCAN CHAINS OF A PR...
- Publication number 20150033360
- Publication date Jan 29, 2015
- Altera Corporation
- Alok Shreekant Doshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DETECTING AND MITIGATING PROGRAMMABLE LOGIC...
- Publication number 20140201852
- Publication date Jul 17, 2014
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE LOGIC BLOCK
- Publication number 20140047401
- Publication date Feb 13, 2014
- Altera Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY
- Publication number 20130279242
- Publication date Oct 24, 2013
- Bruce B. Pedersen
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR SECURING A PROGRAMMABLE DEVICE USING A KIL...
- Publication number 20130271178
- Publication date Oct 17, 2013
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR AUTOMATIC FAULT DETECTION
- Publication number 20130226498
- Publication date Aug 29, 2013
- Altera Corporation
- Bruce B. Pedersen
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS FOR IMPROVING RELIABILITY OF ELECTRONIC CIRCUITRY AND ASS...
- Publication number 20130002287
- Publication date Jan 3, 2013
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECONFIGURABLE LOGIC BLOCK
- Publication number 20130007679
- Publication date Jan 3, 2013
- Altera Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SECURING A PROGRAMMABLE DEVICE USING A KIL...
- Publication number 20120274351
- Publication date Nov 1, 2012
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PROVIDING USER-INITIATED LATCH UP TO DESTRO...
- Publication number 20120274350
- Publication date Nov 1, 2012
- Altera Corporation
- Dirk A. Reese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PREVENTING DATA REMANENCE IN MEMORY SYSTEMS
- Publication number 20120274353
- Publication date Nov 1, 2012
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DETECTING AND MITIGATING PROGRAMMABLE LOGIC...
- Publication number 20120278906
- Publication date Nov 1, 2012
- Altera Corporation
- Bruce B. Pedersen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR SECURING A PROGRAMMABLE DEVICE AGAINST AN O...
- Publication number 20120275077
- Publication date Nov 1, 2012
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY
- Publication number 20120163067
- Publication date Jun 28, 2012
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus for Metastability-Hardened Storage Circuits and Associate...
- Publication number 20110193593
- Publication date Aug 11, 2011
- Altera Corporation
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS FOR METASTABILITY-HARDENED STORAGE CIRCUITS AND ASSOCIATE...
- Publication number 20110074466
- Publication date Mar 31, 2011
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY
- Publication number 20100238715
- Publication date Sep 23, 2010
- Bruce B. Pedersen
- H03 - BASIC ELECTRONIC CIRCUITRY

Bruce B. Pedersen

Person

Patents Grantslast 30 patents

Systems and methods for detecting and mitigating programmable logic...

Techniques for protecting security features of integrated circuits

Systems and methods for detecting and mitigating of programmable lo...

Differential power analysis resistant encryption and decryption fun...

Omnibus logic element

Secure physically unclonable function (PUF) error correction

Systems and methods for authenticating firmware stored on an integr...

Techniques for protecting security features of integrated circuits

Systems and methods for preventing data remanence in memory systems

Setting security features of programmable logic devices

Method and apparatus for securing programming data of a programmabl...

Systems and methods for detecting and mitigating programmable logic...

Address arithmetic on block RAMs

Systems and methods for performing reverse order cryptographic oper...

Setting security features of programmable logic devices

Security variable scrambling

Secure physically unclonable function (PUF) error correction

Emulation of synchronous pipeline registers in integrated circuits...

Systems and methods for preventing data remanence in memory systems

Physically unclonable functions with enhanced margin testing

Stability-enhanced physically unclonable function circuitry

Secure bitstream authentication

Secure partial reconfiguration regions

Transceiver system with reduced latency uncertainty

Omnibus logic element

Apparatus for improving reliability of electronic circuitry and ass...

Systems and methods for generating a key difficult to clone

Security variable scrambling

Address arithmetic on block RAMs

Methods and apparatus for automatic fault detection

Patents Applicationslast 30 patents

DIFFERENTIAL POWER ANALYSIS RESISTANT ENCRYPTION AND DECRYPTION FUN...

SYSTEMS AND METHODS FOR DETECTING AND MITIGATING PROGRAMMABLE LOGIC...

PROGRAMMABLE DEVICE AUTHENTICATION DECRYPTION

Techniques For Protecting Security Features of Integrated Circuits

SYSTEMS AND METHODS FOR PREVENTING DATA REMANENCE IN MEMORY SYSTEMS

Systems and Methods for Detecting and Mitigating of Programmable Lo...

SYSTEMS AND METHODS FOR AUTHENTICATING FIRMWARE STORED ON AN INTEGR...

SETTING SECURITY FEATURES OF PROGRAMMABLE LOGIC DEVICES

SECURE PHYSICALLY UNCLONABLE FUNCTION (PUF) ERROR CORRECTION

Techniques For Protecting Security Features of Integrated Circuits

EMULATION OF SYNCHRONOUS PIPELINE REGISTERS IN INTEGRATED CIRCUITS...

METHODS AND APPARATUS FOR AUTOMATIC FAULT DETECTION

STABILITY-ENHANCED PHYSICALLY UNCLONABLE FUNCTION CIRCUITRY

METHOD AND APPARATUS FOR SECURING CONFIGURATION SCAN CHAINS OF A PR...

SYSTEMS AND METHODS FOR DETECTING AND MITIGATING PROGRAMMABLE LOGIC...

RECONFIGURABLE LOGIC BLOCK

VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY

METHOD AND APPARATUS FOR SECURING A PROGRAMMABLE DEVICE USING A KIL...

METHODS AND APPARATUS FOR AUTOMATIC FAULT DETECTION

APPARATUS FOR IMPROVING RELIABILITY OF ELECTRONIC CIRCUITRY AND ASS...

RECONFIGURABLE LOGIC BLOCK

METHOD AND APPARATUS FOR SECURING A PROGRAMMABLE DEVICE USING A KIL...

SYSTEMS AND METHODS FOR PROVIDING USER-INITIATED LATCH UP TO DESTRO...

SYSTEMS AND METHODS FOR PREVENTING DATA REMANENCE IN MEMORY SYSTEMS

SYSTEMS AND METHODS FOR DETECTING AND MITIGATING PROGRAMMABLE LOGIC...

SYSTEMS AND METHODS FOR SECURING A PROGRAMMABLE DEVICE AGAINST AN O...

VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY

Apparatus for Metastability-Hardened Storage Circuits and Associate...

APPARATUS FOR METASTABILITY-HARDENED STORAGE CIRCUITS AND ASSOCIATE...

VOLATILE MEMORY ELEMENTS WITH SOFT ERROR UPSET IMMUNITY